Latest Research in Hardware Architecture

56 research papers · 2026 median publication year

Top Research Topics in Hardware Architecture

Highest-Cited Papers

  1. PipeGNN: A Bandwidth-Efficient GNN Accelerator with Node-Level Pipelined Push Execution
  2. Scaling Fourier-Based Sparse Matrix Analysis on GPUs
  3. Ozaki Scheme II: A GEMM-oriented emulation of floating-point matrix multiplication using an integer modular technique
  4. Design and Implementation of a Power-Efficient HML-BIST Architecture for BCD Multiplier Testing
  5. A study of optimization levers in a GPU pseudospectral Taylor–Green vortex solver
  6. Accurate Models of AMD Matrix Cores
  7. A study of optimization levers in a GPU pseudospectral Taylor–Green vortex solver
  8. GPU-Accelerated Gate-Level Time-Based Power Analysis via Event-Density-Aware Partitioning and Kernel Fusion
  9. GPU-Accelerated Presolving for Linear Programming
  10. SkyEgg: Heterogeneity-Aware Hardware Synthesis via Equality Saturation
  11. **عنوان انگلیسی:** **Empirical Evaluation and Analytical Modeling of Computational Energy Efficiency in the E4 Processing Architecture** **عنوان فارسی:** **ارزیابی تجربی و مدلسازی تحلیلی بهرهوری انرژی محاسباتی در معماری پردازشی E4**
  12. **عنوان انگلیسی:** **Empirical Evaluation and Analytical Modeling of Computational Energy Efficiency in the E4 Processing Architecture** **عنوان فارسی:** **ارزیابی تجربی و مدلسازی تحلیلی بهرهوری انرژی محاسباتی در معماری پردازشی E4**
  13. **عنوان انگلیسی:** **Empirical Evaluation and Analytical Modeling of Computational Energy Efficiency in the E4 Processing Architecture** **عنوان فارسی:** **ارزیابی تجربی و مدلسازی تحلیلی بهرهوری انرژی محاسباتی در معماری پردازشی E4**
  14. **عنوان انگلیسی:** **Empirical Evaluation and Analytical Modeling of Computational Energy Efficiency in the E4 Processing Architecture** **عنوان فارسی:** **ارزیابی تجربی و مدلسازی تحلیلی بهرهوری انرژی محاسباتی در معماری پردازشی E4**
  15. Programming with Geometry: Synchronous Spatial Execution and Host-Order Erasure in Operator-Witness Fabrics
  16. Programming with Geometry: Synchronous Spatial Execution and Host-Order Erasure in Operator-Witness Fabrics
  17. How to grade the accuracy of the BLAS
  18. Arborist: Algorithm-Hardware Co-Design for Fast and Efficient Motion Planning
  19. DCO: Dynamic Cache Orchestration for LLM Accelerators through Predictive Management
  20. Rethinking Sparse Formats for RISC-V: A Hierarchical Approach to High-Performance SpMV
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L3 Region - - 2026 Sep Q3

Hardware Architecture

56 papers

Top Topics (10)

Hardware Architecture12
Parallel Computing and Optimization Techniques5
Distributed, Parallel, and Cluster Computing5
Mathematical Software4
Big Data and Digital Economy4
Programming Languages3
Performance2
Optimization and Control2
Logic, programming, and type systems2
Low-power high-performance VLSI design2

Top Publications (20)

1.PipeGNN: A Bandwidth-Efficient GNN Accelerator with Node-Level Pipelined Push Execution2.Scaling Fourier-Based Sparse Matrix Analysis on GPUs3.Ozaki Scheme II: A GEMM-oriented emulation of floating-point matrix multiplication using an integer modular technique4.Design and Implementation of a Power-Efficient HML-BIST Architecture for BCD Multiplier Testing5.A study of optimization levers in a GPU pseudospectral Taylor–Green vortex solver6.Accurate Models of AMD Matrix Cores7.A study of optimization levers in a GPU pseudospectral Taylor–Green vortex solver8.GPU-Accelerated Gate-Level Time-Based Power Analysis via Event-Density-Aware Partitioning and Kernel Fusion9.GPU-Accelerated Presolving for Linear Programming10.SkyEgg: Heterogeneity-Aware Hardware Synthesis via Equality Saturation11.**عنوان انگلیسی:** **Empirical Evaluation and Analytical Modeling of Computational Energy Efficiency in the E4 Processing Architecture** **عنوان فارسی:** **ارزیابی تجربی و مدلسازی تحلیلی بهرهوری انرژی محاسباتی در معماری پردازشی E4**12.**عنوان انگلیسی:** **Empirical Evaluation and Analytical Modeling of Computational Energy Efficiency in the E4 Processing Architecture** **عنوان فارسی:** **ارزیابی تجربی و مدلسازی تحلیلی بهرهوری انرژی محاسباتی در معماری پردازشی E4**13.**عنوان انگلیسی:** **Empirical Evaluation and Analytical Modeling of Computational Energy Efficiency in the E4 Processing Architecture** **عنوان فارسی:** **ارزیابی تجربی و مدلسازی تحلیلی بهرهوری انرژی محاسباتی در معماری پردازشی E4**14.**عنوان انگلیسی:** **Empirical Evaluation and Analytical Modeling of Computational Energy Efficiency in the E4 Processing Architecture** **عنوان فارسی:** **ارزیابی تجربی و مدلسازی تحلیلی بهرهوری انرژی محاسباتی در معماری پردازشی E4**15.Programming with Geometry: Synchronous Spatial Execution and Host-Order Erasure in Operator-Witness Fabrics16.Programming with Geometry: Synchronous Spatial Execution and Host-Order Erasure in Operator-Witness Fabrics17.How to grade the accuracy of the BLAS18.Arborist: Algorithm-Hardware Co-Design for Fast and Efficient Motion Planning19.DCO: Dynamic Cache Orchestration for LLM Accelerators through Predictive Management20.Rethinking Sparse Formats for RISC-V: A Hierarchical Approach to High-Performance SpMV
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