Latest Research in VLSI Design and Hardware Acceleration

Top Research Topics in VLSI Design and Hardware Acceleration

• Hardware Architecture — 4 papers
• Machine Learning — 3 papers
• Intelligence, Security, War Strategy — 2 papers
• Mathematics, Computing, and Information Processing — 2 papers
• Advanced Mathematical Theories and Applications — 1 papers
• Number Theory — 1 papers
• Artificial Intelligence — 1 papers
• Low-power high-performance VLSI design — 1 papers
• VLSI and FPGA Design Techniques — 1 papers

Highest-Cited Papers

1. FOREX EVOLVER APPLIED — 2026-07-25 22:21 UTC — 4 avoided / 3 focused — E8 Intelligence Research
2. Fovea: Physical-Implication-Aware Wafer-Scale DSE with Decision-Domain-Guided Cross-Fidelity Refinement
3. Non-standard Zeckendorf decompositions; or, Tribonacci within Fibonacci
4. LEAP: A Self-Supervised Per-Cycle Toggle Propagation Model Supports Fast, Transferable, and Early Analysis of Layout Power
5. FOREX EVOLVER APPLIED — 2026-07-23 11:27 UTC — 4 avoided / 3 focused — E8 Intelligence Research
6. How to Place Images, Figures, and Screenshots in Word Manuals Without Breaking the Layout (archived 2026-07-27)
7. How to Place Images, Figures, and Screenshots in Word Manuals Without Breaking the Layout (archived 2026-07-27)
8. ParasGB: A Graph Benchmark Suite for Parasitic Estimation on AMS Circuits
9. Chip Floorplanning Combining Convex and Non-convex Optimization
10. $k$--Fibonacci numbers with two blocks of repdigits
11. MAGE: Human-Like Macro Placement via Agentic Multimodal Reasoning
12. BBOPlace-Bench: Benchmarking Black-Box Optimization for Chip Placement
13. CLDRoute: Conditional Latent Diffusion for Routability Map Generation in Physical Design
14. Timing-driven Approximate Logic Synthesis Based on Cooperative Search
15. An Analytical Placement Framework for Advanced Hybrid-Row-Height Circuit Designs
16. Differentiable Routability-Driven Package Floorplanning with Pin Assignment

Sub-Regions

• Hardware Architecture — 10 papers
• Mathematics, Computing, and Information Processing — 2 papers
• Intelligence, Security, War Strategy — 2 papers