An Analytical Placement Framework for Advanced Hybrid-Row-Height Circuit Designs

Recently, hybrid-row-height designs have been introduced to achieve performance and area co-optimization in advanced nodes. Hybrid-row-height designs pose significant layout/placement challenges due to the heterogeneous cell and row structures. In this paper, we present an effective framework to address the hybrid-row-height placement problem in three major stages: (1) global placement, (2) legalization, and (3) detailed placement. Inspired by the multi-channel processing method in convolutional neural networks (CNNs), we use the feature extraction technique to equivalently transform the hybrid-row-height global placement problem into two sub-problems that can be solved effectively. We propose a multi-layer nonlinear framework with alignment guidance and a self-adaptive parameter adjustment scheme, which can obtain a high-quality solution to the hybrid-row-height global placement problem. In the legalization stage, we formulate the hybrid-row-height legalization problem as a convex quadratic programming (QP) problem, then apply the robust modulus-based matrix splitting iteration method (RMMSIM) to solve the QP efficiently. After RMMSIM-based global legalization, Tetris-like allocation is used to resolve remaining physical violations. In the detailed placement stage, we develop a whitespace-clustered cell reordering method and feature-aware cell matching method for wirelength optimization, then congestion-aware cell sliding is used to alleviate placement congestion. Compared with the state-of-the-art work, experiments on the 2015 ISPD Contest benchmarks show that our framework can achieve a 7% reduction in final total wirelength and 2.23 × speedup.

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Publication Details

Journal
ACM Transactions on Design Automation of Electronic Systems
Published
2026-07-17
DOI
https://doi.org/10.1145/3831671
Primary Topic
VLSI and FPGA Design Techniques
Type
article
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article

An Analytical Placement Framework for Advanced Hybrid-Row-Height Circuit Designs

Jiarui Chen, Zhifeng Lin, Wen Yuan, Benchao Zhu et al.
ACM Transactions on Design Automation of Electronic Systems
VLSI and FPGA Design Techniques
article

An Analytical Placement Framework for Advanced Hybrid-Row-Height Circuit Designs

Jiarui Chen, Zhifeng Lin, Wen Yuan, Benchao Zhu, Jianli Chen
article en

Abstract

Recently, hybrid-row-height designs have been introduced to achieve performance and area co-optimization in advanced nodes. Hybrid-row-height designs pose significant layout/placement challenges due to the heterogeneous cell and row structures. In this paper, we present an effective framework to address the hybrid-row-height placement problem in three major stages: (1) global placement, (2) legalization, and (3) detailed placement. Inspired by the multi-channel processing method in convolutional neural networks (CNNs), we use the feature extraction technique to equivalently transform the hybrid-row-height global placement problem into two sub-problems that can be solved effectively. We propose a multi-layer nonlinear framework with alignment guidance and a self-adaptive parameter adjustment scheme, which can obtain a high-quality solution to the hybrid-row-height global placement problem. In the legalization stage, we formulate the hybrid-row-height legalization problem as a convex quadratic programming (QP) problem, then apply the robust modulus-based matrix splitting iteration method (RMMSIM) to solve the QP efficiently. After RMMSIM-based global legalization, Tetris-like allocation is used to resolve remaining physical violations. In the detailed placement stage, we develop a whitespace-clustered cell reordering method and feature-aware cell matching method for wirelength optimization, then congestion-aware cell sliding is used to alleviate placement congestion. Compared with the state-of-the-art work, experiments on the 2015 ISPD Contest benchmarks show that our framework can achieve a 7% reduction in final total wirelength and 2.23 × speedup.

ACM Transactions on Design Automation of Electronic Systems
Fudan University (CN), Fuzhou University (CN)
Peace, Justice and strong institutions
Openalex Percentile: Top 14%
VLSI and FPGA Design Techniques
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An Analytical Placement Framework for Advanced Hybrid-Row-Height Circuit Designs — Jiarui Chen, Zhifeng Lin, et al. · ACM Transactions on Design Automation of Electronic Systems (2026) | TGRS Research Map | TGRS