Ferroelectric‐Enabled Dual‐Gate WSe ₂ Transistors for Non‐volatile and Reconfigurable Circuits

ABSTRACT Reconfigurable transistors integrating memory and logic functions are promising for beyond‐von‐Neumann computing, yet existing architectures often suffer from limited operational flexibility and coupled programming/readout mechanisms. Here, a ferroelectric‐enabled dual‐gate WSe 2 ambipolar transistor is demonstrated using a ferroelectric P(VDF‐TrFE) top gate and a conventional back gate to achieve decoupled non‐volatile polarity programming and volatile logic operation. The ambipolar WSe 2 channel can be reversibly configured into stable n‐type or p‐type states, enabling symmetric dual‐mode multi‐state memory with an ON/OFF ratio up to 10 7 , switching speed down to 500 ns, energy consumption of 0.2 fJ, and endurance exceeding 10 7 cycles. Leveraging the intrinsic polarity reconfigurability, multiple Boolean logic gates and a compact 1‐bit content‐addressable memory (CAM) cell are implemented within a single transistor. In addition, a programmable complementary inverter with tunable switching thresholds enables multi‐state voltage encoding for enhanced neuromorphic vision processing. This work provides a versatile platform for multifunctional, energy‐efficient, and adaptive in‐memory computing systems.