Thermal annealing-induced charge storage enhancement in WO3/β-Ga2O3 nanowire heterostructures for MOS capacitive memory

Abstract This paper examines non-volatile metal oxide semiconductor (MOS) capacitive memory based on WO3/β-Ga2O3 heterostructure nanowire arrays. The WO3/β-Ga2O3 vertical oriented axial heterostructure nanowires (VAHNWs) were synthesized using glancing angle deposition (GLAD) technique installed in an RF sputtering system. The fabricated VAHNWs were also subjected to air annealing at 600 ˚C for 1 hour. The interface trap density (D_it) decreased from 1.7×10^10 〖eV〗^(-1) 〖cm〗^(-2) (as-deposited) to 1×10^10 〖eV〗^(-1) 〖cm〗^(-2)(annealed) which is consistent with a reduction in electrically active interface states. The MOS capacitor exhibited a significant memory window of approximately 5.35 V at ± 8 V and stable endurance over 2000 programming/erasing cycles. Moreover, a charge retention duration as long as 3.5×10^(4 ) s was observed after annealing. These enhanced parameters can be ascribed to the annealing-induced modification of electrically active defects together with improved interface quality. The results demonstrated the thermally annealed WO3/β-Ga2O3 VAHNWs as a promising candidate for future non-volatile memory technologies..