Relays at the Bottom: Switching Energy and the Contact Floor of Nanoelectromechanical Logic

Nanoelectromechanical relays switch with near-zero leakage and abrupt thresholds, and their electrostatic actuation energy can in principle undercut CMOS. This paper prices the whole device from published parameters. A demonstrated four-terminal micro-relay (10 V actuation, 1.1068 fF gate capacitance from its stated geometry, 100 ns mechanical delay; Kam et al. 2009, Kam 2013) spends 5.5339e-14 J per transition, 196.76 times the representative CMOS gate energy of 2.8125e-16 J (companion analysis, DOI 10.5281/zenodo.24102536), with an energy-delay product 1.97e6 times worse. A projected scaled relay (1.0 V, 0.3542 fF, 10 ns; Lee et al. 2013, Peschot et al. 2015) spends 1.7708e-16 J, 0.630 times the CMOS figure, but its energy-delay product remains 629.63 times worse, and its switching energy sits at the contact adhesion scale. At the best demonstrated endurance of 1e9 cycles a continuously clocked relay lives 100 s at 10 MHz and 10 s at 100 MHz, a million-device chip expects its first contact failure after 1,000 cycles, and a ten-year life allows an average of only 3.17 toggles per second per device; continuous ten-year service at 100 MHz requires 3.16e15 to 3.16e16 cycles. A regime where zero leakage outweighs the wear floor exists only for normally-off, event-driven, configuration and power-gating roles at average toggle rates of a few per second (a few hundred at a projected 1e11-cycle endurance), and for slow roles in heat and radiation. Sensitivity is reported over the published endurance range 1e6 to 1e14 cycles. Model calculations are labelled SIMULATED, NOT MEASURED. The deposit includes the paper PDF, the computation script (compute.py) that produces every number in the paper, and its outputs (results.json, results.txt).