Compact Analog Correlated Multiple Sampling with Ping-Pong Readout for Cooled Low-Noise Image Sensors

Conventional analog correlated multiple sampling (CMS) techniques become increasingly area-intensive when implemented in ping-pong column readout architectures because dedicated sampling capacitors are typically required for each interleaved readout path. This paper presents a compact analog ping-pong correlated multiple sampling (PP-CMS) architecture for cooled global-shutter image sensors that addresses this limitation by reusing storage capacitors across the two ping-pong paths. The proposed architecture enables 4-point CMS operation while requiring only two additional capacitors and three switches, without modifying the original ping-pong readout operation. The DDS-only column occupies approximately 550μm, and the additional PP-CMS circuitry increases the total column length by 50μm to approximately 600μm, corresponding to a 9.1% length overhead relative to the DDS-only implementation. A mathematical noise model is developed to analyze the thermal- and flicker-noise behavior of the proposed architecture and to clarify its trade-off relative to conventional switched-capacitor CMS. Since the proposed PP-CMS applies averaging directly to the double-delta sampling (DDS) output, it does not introduce the additional low-frequency attenuation associated with the reset–signal differencing operation of conventional SC-CMS; therefore, it is intended to improve the area–noise trade-off in ping-pong ROICs rather than to maximize intrinsic low-frequency flicker-noise suppression. A prototype readout integrated circuit (ROIC) fabricated in a 0.18-μm CMOS process was experimentally characterized at 80 K. The measured output noise was reduced from 93.5 μVrms for the DDS-only operation to 73.8 μVrms with 4-point PP-CMS, corresponding to a 21% reduction. These results demonstrate that the proposed PP-CMS architecture provides an effective trade-off between silicon area and readout-noise reduction for compact ping-pong ROIC implementations in cooled infrared imaging systems.

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Publication Details

Journal
Micromachines
Published
2026-11-09
DOI
https://doi.org/10.3390/mi17111299
Primary Topic
CCD and CMOS Imaging Sensors
Type
article
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article

Compact Analog Correlated Multiple Sampling with Ping-Pong Readout for Cooled Low-Noise Image Sensors

Enver Çavuş, Mahir Şanli, Mehmet Ali Gülden
Micromachines
CCD and CMOS Imaging Sensors
article

Compact Analog Correlated Multiple Sampling with Ping-Pong Readout for Cooled Low-Noise Image Sensors

Enver Çavuş, Mahir Şanli, Mehmet Ali Gülden
article en

Abstract

Conventional analog correlated multiple sampling (CMS) techniques become increasingly area-intensive when implemented in ping-pong column readout architectures because dedicated sampling capacitors are typically required for each interleaved readout path. This paper presents a compact analog ping-pong correlated multiple sampling (PP-CMS) architecture for cooled global-shutter image sensors that addresses this limitation by reusing storage capacitors across the two ping-pong paths. The proposed architecture enables 4-point CMS operation while requiring only two additional capacitors and three switches, without modifying the original ping-pong readout operation. The DDS-only column occupies approximately 550μm, and the additional PP-CMS circuitry increases the total column length by 50μm to approximately 600μm, corresponding to a 9.1% length overhead relative to the DDS-only implementation. A mathematical noise model is developed to analyze the thermal- and flicker-noise behavior of the proposed architecture and to clarify its trade-off relative to conventional switched-capacitor CMS. Since the proposed PP-CMS applies averaging directly to the double-delta sampling (DDS) output, it does not introduce the additional low-frequency attenuation associated with the reset–signal differencing operation of conventional SC-CMS; therefore, it is intended to improve the area–noise trade-off in ping-pong ROICs rather than to maximize intrinsic low-frequency flicker-noise suppression. A prototype readout integrated circuit (ROIC) fabricated in a 0.18-μm CMOS process was experimentally characterized at 80 K. The measured output noise was reduced from 93.5 μVrms for the DDS-only operation to 73.8 μVrms with 4-point PP-CMS, corresponding to a 21% reduction. These results demonstrate that the proposed PP-CMS architecture provides an effective trade-off between silicon area and readout-noise reduction for compact ping-pong ROIC implementations in cooled infrared imaging systems.

MicromachinesVol. 17(11)
Ankara Yıldırım Beyazıt University (TR), Aselsan (Turkey) (TR)
CCD and CMOS Imaging Sensors
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