Physics-Based Gate Stack Optimisation of p-GaN/AlGaN/GaN HEMTs for Balanced Threshold Voltage and On-Resistance

Abstract In this article, the gate-stack design space of p-GaN/AlGaN/GaN HEMTs (high electron mobility transistors) is explored to achieve a balanced threshold voltage (V T ) and on-resistance (R on ). Physics-based analytical models for V T and R on are validated against experimental data and subsequently employed for a 10,000-point design-space exploration encompassing variations in p-GaN doping concentration, Schottky built-in potential, AlGaN thickness, and Al mole fraction. While a high V T is essential for robust enhancement-mode operation and adequate gate-noise immunity, a low R on is required to minimize conduction losses. The study reveals the inherent trade-off between V T and R on , and identifies an optimum gate-stack design region that balances these competing requirements. Based on the explored design space, practical design guidelines are established to maintain V T within the range of 1.7–2.2 V while achieving the lowest possible R on under process-induced variations of gate-stack parameters.