An Intermittent Fault Diagnosis Framework for Analog Circuits Based on Transient Morphology-Aware Feature Enhancement and Boundary-Aware Segment-Consistency Learning

Intermittent faults in analog circuits are random, non-stationary, and of short duration. Conventional diagnostic methods struggle to simultaneously achieve high-precision localization and classification of faults in a signal. To address this limitation, this study proposes an intermittent fault diagnosis framework for analog circuits based on transient morphology-aware feature enhancement and boundary-aware segment-consistency learning. First, dilated and standard convolutions are employed to extract multiscale local fault features. A transient morphology-aware convolutional block attention module (TMA-CBAM) implements transient morphology-aware feature enhancement by emphasizing short-duration abrupt changes and local abnormal peaks. Then, bidirectional long short-term memory (BiLSTM) layers capture temporal dependencies for point-wise prediction. During training, boundary-aware segment-consistency (BASC) learning is implemented through a BASC loss that promotes prediction continuity within fault segments while avoiding excessive smoothing at true fault boundaries. The proposed model achieved a classification accuracy of 98.75% on a constructed dataset comprising 5,100 samples covering 17 fault types, outperforming five baseline models, namely CNN, TCN, BiLSTM, S-Transformer, and CNN-LSTM. Ablation studies further verify the effectiveness of the proposed model. The proposed model provides an effective solution for fault interval identification and fault classification of intermittent faults in analog circuits, offering a reference for the intelligent maintenance of industrial electronic systems.

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Publication Details

Journal
Cybernetics & Systems
Published
2026-11-05
DOI
https://doi.org/10.1080/01969722.2026.2758733
Primary Topic
VLSI and Analog Circuit Testing
Type
article
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article

An Intermittent Fault Diagnosis Framework for Analog Circuits Based on Transient Morphology-Aware Feature Enhancement and Boundary-Aware Segment-Consistency Learning

Zhenyang Lv, Jiayi Zhang, Junyou Shi, Shuqiang Liu
Cybernetics & Systems
VLSI and Analog Circuit Testing
article

An Intermittent Fault Diagnosis Framework for Analog Circuits Based on Transient Morphology-Aware Feature Enhancement and Boundary-Aware Segment-Consistency Learning

Zhenyang Lv, Jiayi Zhang, Junyou Shi, Shuqiang Liu
article en

Abstract

Intermittent faults in analog circuits are random, non-stationary, and of short duration. Conventional diagnostic methods struggle to simultaneously achieve high-precision localization and classification of faults in a signal. To address this limitation, this study proposes an intermittent fault diagnosis framework for analog circuits based on transient morphology-aware feature enhancement and boundary-aware segment-consistency learning. First, dilated and standard convolutions are employed to extract multiscale local fault features. A transient morphology-aware convolutional block attention module (TMA-CBAM) implements transient morphology-aware feature enhancement by emphasizing short-duration abrupt changes and local abnormal peaks. Then, bidirectional long short-term memory (BiLSTM) layers capture temporal dependencies for point-wise prediction. During training, boundary-aware segment-consistency (BASC) learning is implemented through a BASC loss that promotes prediction continuity within fault segments while avoiding excessive smoothing at true fault boundaries. The proposed model achieved a classification accuracy of 98.75% on a constructed dataset comprising 5,100 samples covering 17 fault types, outperforming five baseline models, namely CNN, TCN, BiLSTM, S-Transformer, and CNN-LSTM. Ablation studies further verify the effectiveness of the proposed model. The proposed model provides an effective solution for fault interval identification and fault classification of intermittent faults in analog circuits, offering a reference for the intelligent maintenance of industrial electronic systems.

Cybernetics & Systems
National Key Laboratory of Science and Technology on Reliability and Environmental Engineering (CN), Beihang University (CN)
Openalex Percentile: Top 10%
VLSI and Analog Circuit Testing
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