Correctness Before Reuse: A CPU Contract Pilot for Kernel Optimization Memory

A kernel that returns a plausible value on its first input may fail when runtime values, specialization parameters, layout, or a partial tile changes. We report a completed CPU validation pilot for such reuse boundaries. A frozen registry of eight host implementations is evaluated on 192 cases across addition, masked row softmax, and RMSNorm, producing 1,536 candidate-case checks. The suite contains 128 nonempty cases and 64 empty-shape contract checks. A host reference and a complete dispatch-metadata key pass all cases. Five of six seeded fault controls pass a benign first-input gate, yet every fault control fails at least one stronger check. Shape-only specialization passes 48/192, cached outputs 128/192, dropped tail rows 102/192, input mutation 160/192, a float16 shortcut 133/192, and naive float32 reduction 188/192. A separate 50-digit Decimal implementation verifies all target arrays within the frozen tolerance, replays all candidate checks, and confirms 40 nonempty input/oracle identities. These results establish an auditable validation artifact, not kernel speedup or learned optimization. The memory stores dispatch metadata rather than compiled code. A separate, uncompiled NKI entrypoint documents the next target-device stage. Future work applies the gate to actual Trainium compilation, profiling, generated candidates, and transfer across workload families under bounded credits.

Authors

Publication Details

Journal
Preprints.org
Published
2026-11-03
DOI
https://doi.org/10.20944/preprints202611.0191.v1
Primary Topic
Parallel Computing and Optimization Techniques
Type
preprint
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
preprint

Correctness Before Reuse: A CPU Contract Pilot for Kernel Optimization Memory

Saurav Keshari Aryal
Preprints.org
Parallel Computing and Optimization Techniques
preprint

Correctness Before Reuse: A CPU Contract Pilot for Kernel Optimization Memory

Saurav Keshari Aryal
preprint en

Abstract

A kernel that returns a plausible value on its first input may fail when runtime values, specialization parameters, layout, or a partial tile changes. We report a completed CPU validation pilot for such reuse boundaries. A frozen registry of eight host implementations is evaluated on 192 cases across addition, masked row softmax, and RMSNorm, producing 1,536 candidate-case checks. The suite contains 128 nonempty cases and 64 empty-shape contract checks. A host reference and a complete dispatch-metadata key pass all cases. Five of six seeded fault controls pass a benign first-input gate, yet every fault control fails at least one stronger check. Shape-only specialization passes 48/192, cached outputs 128/192, dropped tail rows 102/192, input mutation 160/192, a float16 shortcut 133/192, and naive float32 reduction 188/192. A separate 50-digit Decimal implementation verifies all target arrays within the frozen tolerance, replays all candidate checks, and confirms 40 nonempty input/oracle identities. These results establish an auditable validation artifact, not kernel speedup or learned optimization. The memory stores dispatch metadata rather than compiled code. A separate, uncompiled NKI entrypoint documents the next target-device stage. Future work applies the gate to actual Trainium compilation, profiling, generated candidates, and transfer across workload families under bounded credits.

Preprints.org
Parallel Computing and Optimization Techniques
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.

Laika access coming soon