RAID: A Metal-Accelerated C++ Framework for Reproducible High-Frequency Financial Econometrics: Batched, Fused and Streaming Estimation on Apple Silicon without Sacrificing Inference

We ask whether heterogeneous high-frequency econometric workloads—realized measures, rolling and batched regressions, HAR forecasting models, GARCH-family quasi-maximum likelihood, block bootstrap inference—can be reorganised into batched, fused, streaming computation on Apple Silicon GPUs without sacrificing estimator accuracy, statistical inference, or reproducibility. Apple GPUs expose no 64-bit floating point. RAID answers with a C++20 library whose FP64 CPU backend is the reference, whose Metal backend accumulates every statistic in compensated "double-float" arithmetic and combines chunked partial sums in FP64, and whose estimators report backend, precision, convergence and provenance in every result. Tier A methods reproduce highfrequency, rugarch, statsmodels and arch to documented tolerances; Monte Carlo experiments confirm bias, RMSE and coverage; GPU and CPU results agree to 10⁻⁶ relative and are bitwise reproducible across runs and thread counts. Using one year of 1-minute bars for a seeded universe of 1,000 US equities served by a private FirstRate Data lakehouse, we measure break-even points on an M5 Max laptop and across eleven Apple Silicon generations (M2 to M6). The GPU wins on fused realized measures beyond roughly 4 × 10⁴ elements and on batched GARCH likelihood evaluation when many parameter vectors are evaluated per series; the CPU wins on rolling sums, on single-vector GARCH recursions and on small panels. Conversion and buffer traffic, not kernel time, dominate GPU wall-clock: unified memory is not free computation. We publish the negative results, the tolerances, and a reproducible benchmark protocol. UQO Working Paper No. 40, version 1.0 (November 2026), 36 pages. JEL: C58, C63, C87, G17.

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Publication Details

Journal
Zenodo (CERN European Organization for Nuclear Research)
Published
2026-11-02
DOI
https://doi.org/10.5281/zenodo.23933470
Citations
1
Primary Topic
Parallel Computing and Optimization Techniques
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article
Field-Weighted Citation Impact
4.86
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article

RAID: A Metal-Accelerated C++ Framework for Reproducible High-Frequency Financial Econometrics: Batched, Fused and Streaming Estimation on Apple Silicon without Sacrificing Inference

Simon-Pierre Boucher
1 citations
Zenodo (CERN European Organization for Nuclear Research)
Parallel Computing and Optimization Techniques
4.86
article

RAID: A Metal-Accelerated C++ Framework for Reproducible High-Frequency Financial Econometrics: Batched, Fused and Streaming Estimation on Apple Silicon without Sacrificing Inference

Simon-Pierre Boucher
article en
1 citations

Abstract

We ask whether heterogeneous high-frequency econometric workloads—realized measures, rolling and batched regressions, HAR forecasting models, GARCH-family quasi-maximum likelihood, block bootstrap inference—can be reorganised into batched, fused, streaming computation on Apple Silicon GPUs without sacrificing estimator accuracy, statistical inference, or reproducibility. Apple GPUs expose no 64-bit floating point. RAID answers with a C++20 library whose FP64 CPU backend is the reference, whose Metal backend accumulates every statistic in compensated "double-float" arithmetic and combines chunked partial sums in FP64, and whose estimators report backend, precision, convergence and provenance in every result. Tier A methods reproduce highfrequency, rugarch, statsmodels and arch to documented tolerances; Monte Carlo experiments confirm bias, RMSE and coverage; GPU and CPU results agree to 10⁻⁶ relative and are bitwise reproducible across runs and thread counts. Using one year of 1-minute bars for a seeded universe of 1,000 US equities served by a private FirstRate Data lakehouse, we measure break-even points on an M5 Max laptop and across eleven Apple Silicon generations (M2 to M6). The GPU wins on fused realized measures beyond roughly 4 × 10⁴ elements and on batched GARCH likelihood evaluation when many parameter vectors are evaluated per series; the CPU wins on rolling sums, on single-vector GARCH recursions and on small panels. Conversion and buffer traffic, not kernel time, dominate GPU wall-clock: unified memory is not free computation. We publish the negative results, the tolerances, and a reproducible benchmark protocol. UQO Working Paper No. 40, version 1.0 (November 2026), 36 pages. JEL: C58, C63, C87, G17.

Zenodo (CERN European Organization for Nuclear Research)
Université du Québec en Outaouais (CA)
Openalex Percentile: Top 4%
Parallel Computing and Optimization Techniques
4.86
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RAID: A Metal-Accelerated C++ Framework for Reproducible High-Frequency Financial Econometrics: Batched, Fused and Streaming Estimation on Apple Silicon without Sacrificing Inference — Simon-Pierre Boucher · Zenodo (CERN European Organization for Nuclear Research) (2026) | TGRS Research Map | TGRS