Microprocessor-Based Data Acquisition System for Analog Signal Measurement Using ADC and DAC Interfacing

Data acquisition connects the analog physical world with digital processors. This paper presents a microprocessor-based data acquisition system for analog signal measurement, using an analog-to-digital converter (ADC) for input and a digital-to-analog converter (DAC) for output, connected to a microprocessor training kit. The software reads and scales input voltages, displays or stores the data, and reproduces values at the analog output. Conversion accuracy, linearity and the achievable sampling rate are evaluated by calculation and simulation. In simulation the 8-bit ADC had a maximum deviation of 1.34 LSB from the ideal line (including quantization), the quantization error was ±0.5 LSB (9.8 mV) and the acquisition loop allowed about 6.9 kS/s.

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Publication Details

Journal
Zenodo (CERN European Organization for Nuclear Research)
Published
2026-10-31
DOI
https://doi.org/10.5281/zenodo.23835189
Primary Topic
Embedded Systems and FPGA Design
Type
preprint
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preprint

Microprocessor-Based Data Acquisition System for Analog Signal Measurement Using ADC and DAC Interfacing

Yslam Orazov, Rahmanberdi Baýmuhammedow, Ayjemal Ussayeva
Zenodo (CERN European Organization for Nuclear Research)
Embedded Systems and FPGA Design
preprint

Microprocessor-Based Data Acquisition System for Analog Signal Measurement Using ADC and DAC Interfacing

Yslam Orazov, Rahmanberdi Baýmuhammedow, Ayjemal Ussayeva
preprint en

Abstract

Data acquisition connects the analog physical world with digital processors. This paper presents a microprocessor-based data acquisition system for analog signal measurement, using an analog-to-digital converter (ADC) for input and a digital-to-analog converter (DAC) for output, connected to a microprocessor training kit. The software reads and scales input voltages, displays or stores the data, and reproduces values at the analog output. Conversion accuracy, linearity and the achievable sampling rate are evaluated by calculation and simulation. In simulation the 8-bit ADC had a maximum deviation of 1.34 LSB from the ideal line (including quantization), the quantization error was ±0.5 LSB (9.8 mV) and the acquisition loop allowed about 6.9 kS/s.

Zenodo (CERN European Organization for Nuclear Research)
Oguz Han Engineering and Technology University of Turkmenistan (TM)
Embedded Systems and FPGA Design
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