Dual-Gate IGZO Transistor-based Time-Varying Reservoir Computing for Highly Efficient Human Action Processing

Abstract Physical reservoir computing (PRC), which leverages the intrinsic dynamics of materials, offers significant advantages for time-series processing with its low training complexity. However, most reported PRC systems suffer from fixed characteristic timescales, which limits their applicability to scenarios involving widely varying temporal dynamics. To address this issue, we demonstrate an on-chip PRC system based on a dual-gate IGZO transistor. In this device, a modulation gate is introduced to electrically control the relaxation timescale by tuning the ionic relaxation of the electric double layer (EDL). As a result, the device enables ~3.3-fold tunable timescales and is feasible for monolithic integration. A 5 kb IGZO transistor array is fabricated and integrated with a custom FPGA board, providing an array‑level and FPGA‑based demonstration of a time-varying reservoir computing (TV-RC) system. This TV‑RC system enables multiple time-series processing tasks, including electrocardiogram (ECG) and speech signal classification. Furthermore, human action recognition, which has not been accomplished by previous on-chip PRC systems, is validated in this system using the UTD-MHAD dataset. The system achieves an average recognition accuracy of 91.85% across 27 actions. It consumes 5.15 mJ/action for inference, with only 3.99 J/action for reservoir state generation. Our design would be of profound significance for extending the boundaries of physical reservoir computing, especially for vision-based intelligent tasks.