GC-Assisted Runtime Integrity Verification for Heap-Resident Bytecode in an FPGA-Based Virtual Machine

Dynamic-language virtual machines store compiled functions as garbage-collected heap objects, yet embedded and field-programmable gate array (FPGA) integrity mechanisms check code only at load time or ignore whether memory holds live code. picoStella, a proof-of-concept FPGA-targeted virtual machine, reauthenticates live code in every garbage-collection pass: after marking, a verification pass uses the mark bits to re-hash each reachable function with SHA3-256 (Secure Hash Algorithm 3) against a write-once trusted digest. The design passed 36 testbenches with identical results across two simulators, was synthesized for a Cyclone IV E FPGA, and its verifier was tested on a DE2-115 board. A closed-form model predicts per-function cost exactly; verification adds 167–8914% to the mark-sweep cost for up to eight 256-byte functions. Reusing the collector’s reachability saves 0.40% over a verifier with its own traversal, but up to 83% over a liveness-oblivious scrubber. Detection takes 42–314 cycles, all 5770 injected bytecode faults were detected, and board-level debug-register injection reproduced these latencies. On-chip clock glitching defeated detection in 4.5% of corrupted trials. Register-level soft-error injection shows SHA3-state upsets fail safe, whereas control or metadata upsets can hang a pass or skip a function. The time-of-check-to-time-of-use window is narrowed, not closed; the reset-cleared lock is not a root of trust; larger-scale costs are projections.

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Publication Details

Journal
Electronics
Published
2026-10-30
DOI
https://doi.org/10.3390/electronics15215032
Primary Topic
Security and Verification in Computing
Type
article
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article

GC-Assisted Runtime Integrity Verification for Heap-Resident Bytecode in an FPGA-Based Virtual Machine

Esad Kadušić, Christoph Ruland, Elmin Marevac, Nataša Živić
Electronics
Security and Verification in Computing
article

GC-Assisted Runtime Integrity Verification for Heap-Resident Bytecode in an FPGA-Based Virtual Machine

Esad Kadušić, Christoph Ruland, Elmin Marevac, Nataša Živić
article en

Abstract

Dynamic-language virtual machines store compiled functions as garbage-collected heap objects, yet embedded and field-programmable gate array (FPGA) integrity mechanisms check code only at load time or ignore whether memory holds live code. picoStella, a proof-of-concept FPGA-targeted virtual machine, reauthenticates live code in every garbage-collection pass: after marking, a verification pass uses the mark bits to re-hash each reachable function with SHA3-256 (Secure Hash Algorithm 3) against a write-once trusted digest. The design passed 36 testbenches with identical results across two simulators, was synthesized for a Cyclone IV E FPGA, and its verifier was tested on a DE2-115 board. A closed-form model predicts per-function cost exactly; verification adds 167–8914% to the mark-sweep cost for up to eight 256-byte functions. Reusing the collector’s reachability saves 0.40% over a verifier with its own traversal, but up to 83% over a liveness-oblivious scrubber. Detection takes 42–314 cycles, all 5770 injected bytecode faults were detected, and board-level debug-register injection reproduced these latencies. On-chip clock glitching defeated detection in 4.5% of corrupted trials. Register-level soft-error injection shows SHA3-state upsets fail safe, whereas control or metadata upsets can hang a pass or skip a function. The time-of-check-to-time-of-use window is narrowed, not closed; the reset-cleared lock is not a root of trust; larger-scale costs are projections.

ElectronicsVol. 15(21)
University of Sarajevo (BA), Leipzig University of Applied Sciences (DE), University of Zenica (BA), University of Siegen (DE)
Openalex Percentile: Top 14%
Security and Verification in Computing
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GC-Assisted Runtime Integrity Verification for Heap-Resident Bytecode in an FPGA-Based Virtual Machine — Esad Kadušić, Christoph Ruland, et al. · Electronics (2026) | TGRS Research Map | TGRS