HaVen-Agent: Enhancing Hallucination-Mitigated Verilog Code Generation Aligned with HDL Engineers through Code Repair and Multi-Agent Orchestration

Recently, the use of large language models (LLMs) for Verilog code generation has attracted great research interest to enable hardware design automation. However, previous works have shown a gap between the ability of LLMs and the practical demands of hardware description language (HDL) engineering. This gap includes differences in how engineers phrase questions and hallucinations in the generated code. To address these challenges, we introduce HaVen , a novel LLM framework designed to mitigate hallucinations and align Verilog code generation with the practices of HDL engineers. HaVen tackles hallucination issues by proposing a comprehensive taxonomy and employing a chain-of-thought (CoT) mechanism to translate symbolic modalities ( e .g. truth tables, state diagrams, e tc.) into accurate natural language descriptions. Furthermore, HaVen bridges this gap by using a data augmentation strategy, synthesizing high-quality instruction-code pairs that match real HDL engineering practices. Building upon HaVen , we develop HaVen -R, a reasoning-augmented extension fine-tuned with a Rejection Sampling Fine-Tuning (RFT) Dataset and a Reasoning Dataset, enabling Chain-of-Thought (CoT) guided self-reflection to iteratively repair Verilog code. We further introduce HaVen -Agent, a multi-agent system that orchestrates a Planner Agent (GPT-4o), a Coder Agent ( HaVen -R), and a Verifier Agent for iterative code repair. Our experiments demonstrate that HaVen -Agent significantly improves the correctness of Verilog code generation, outperforming state-of-the-art methods on VerilogEval and RTLLM benchmarks. Additional evaluations include a 400-case multi-generator repair study, component and iteration ablations, CVDP, end-to-end cost and latency analysis, and protocol-aware comparisons with recent feedback, agentic, and reasoning-augmented methods. HaVen is publicly available at https://github.com/Intelligent-Computing-Research-Group/HaVen.

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Journal
ACM Transactions on Design Automation of Electronic Systems
Published
2026-10-28
DOI
https://doi.org/10.1145/3856825
Primary Topic
Embedded Systems Design Techniques
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article
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article

HaVen-Agent: Enhancing Hallucination-Mitigated Verilog Code Generation Aligned with HDL Engineers through Code Repair and Multi-Agent Orchestration

Zhezhi He, Chen Nie, Pengju Liu, Mengnan Qi et al.
2 links
ACM Transactions on Design Automation of Electronic Systems
Embedded Systems Design Techniques
article

HaVen-Agent: Enhancing Hallucination-Mitigated Verilog Code Generation Aligned with HDL Engineers through Code Repair and Multi-Agent Orchestration

Zhezhi He, Chen Nie, Pengju Liu, Mengnan Qi, Xuhong Zhang, Yiyao Yang, Fu Teng, Cheng Zou, Shuo Yang, Ruitong An
article en

Abstract

Recently, the use of large language models (LLMs) for Verilog code generation has attracted great research interest to enable hardware design automation. However, previous works have shown a gap between the ability of LLMs and the practical demands of hardware description language (HDL) engineering. This gap includes differences in how engineers phrase questions and hallucinations in the generated code. To address these challenges, we introduce HaVen , a novel LLM framework designed to mitigate hallucinations and align Verilog code generation with the practices of HDL engineers. HaVen tackles hallucination issues by proposing a comprehensive taxonomy and employing a chain-of-thought (CoT) mechanism to translate symbolic modalities ( e .g. truth tables, state diagrams, e tc.) into accurate natural language descriptions. Furthermore, HaVen bridges this gap by using a data augmentation strategy, synthesizing high-quality instruction-code pairs that match real HDL engineering practices. Building upon HaVen , we develop HaVen -R, a reasoning-augmented extension fine-tuned with a Rejection Sampling Fine-Tuning (RFT) Dataset and a Reasoning Dataset, enabling Chain-of-Thought (CoT) guided self-reflection to iteratively repair Verilog code. We further introduce HaVen -Agent, a multi-agent system that orchestrates a Planner Agent (GPT-4o), a Coder Agent ( HaVen -R), and a Verifier Agent for iterative code repair. Our experiments demonstrate that HaVen -Agent significantly improves the correctness of Verilog code generation, outperforming state-of-the-art methods on VerilogEval and RTLLM benchmarks. Additional evaluations include a 400-case multi-generator repair study, component and iteration ablations, CVDP, end-to-end cost and latency analysis, and protocol-aware comparisons with recent feedback, agentic, and reasoning-augmented methods. HaVen is publicly available at https://github.com/Intelligent-Computing-Research-Group/HaVen.

ACM Transactions on Design Automation of Electronic Systems
Shanghai Jiao Tong University (CN), Shanghai Artificial Intelligence Laboratory (CN), Zhejiang University (CN)
Openalex Percentile: Top 9%
Embedded Systems Design Techniques
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