Daopological Structural Annealing (DSA): A Gradient-Free Discrete Topological Pre-Solver for IC Global Routing Congestion

Global routing in modern integrated circuit (IC) physical design faces severe challenges. Because routing resources and netlist demands easily conflict in non-convex continuous spaces, traditional calculus-based gradient optimization methods often fall into local minima, leading to severe routing congestion and design rule violations (DRV). This paper proposes a global routing pre-solver paradigm based on Daopological Structural Annealing (DSA). Abandoning the differentiability assumption, DSA maps the routing problem into discrete topological grid points. Utilizing three topological operators—Permutation, Inversion, and Cardinality Mutation—driven by the Metropolis criterion from statistical physics, the system rapidly converges to the ground state of the energy landscape. Empirical results on an industrial-grade benchmark containing thousands of nets demonstrate that DSA reduces the total overflow of the global grid to zero in a remarkably short time. Validated by the detailed routing engine of an open-source EDA toolchain, the scheme successfully achieves physical connections with 0 design rule violations (DRC). This provides a new, gradient-free, and ultra-fast topological search paradigm for efficient routing in very-large-scale integration (VLSI).

Authors

Publication Details

Journal
Zenodo (CERN European Organization for Nuclear Research)
Published
2026-10-27
DOI
https://doi.org/10.5281/zenodo.23688840
Primary Topic
VLSI and FPGA Design Techniques
Type
preprint
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preprint

Daopological Structural Annealing (DSA): A Gradient-Free Discrete Topological Pre-Solver for IC Global Routing Congestion

Baoyuan Zhang
2 links
Zenodo (CERN European Organization for Nuclear Research)
VLSI and FPGA Design Techniques
preprint

Daopological Structural Annealing (DSA): A Gradient-Free Discrete Topological Pre-Solver for IC Global Routing Congestion

Baoyuan Zhang
preprint en

Abstract

Global routing in modern integrated circuit (IC) physical design faces severe challenges. Because routing resources and netlist demands easily conflict in non-convex continuous spaces, traditional calculus-based gradient optimization methods often fall into local minima, leading to severe routing congestion and design rule violations (DRV). This paper proposes a global routing pre-solver paradigm based on Daopological Structural Annealing (DSA). Abandoning the differentiability assumption, DSA maps the routing problem into discrete topological grid points. Utilizing three topological operators—Permutation, Inversion, and Cardinality Mutation—driven by the Metropolis criterion from statistical physics, the system rapidly converges to the ground state of the energy landscape. Empirical results on an industrial-grade benchmark containing thousands of nets demonstrate that DSA reduces the total overflow of the global grid to zero in a remarkably short time. Validated by the detailed routing engine of an open-source EDA toolchain, the scheme successfully achieves physical connections with 0 design rule violations (DRC). This provides a new, gradient-free, and ultra-fast topological search paradigm for efficient routing in very-large-scale integration (VLSI).

Zenodo (CERN European Organization for Nuclear Research)
Industry, innovation and infrastructure
VLSI and FPGA Design Techniques
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