Beyond Microcontrollers: End-to-End Full Decryption Oracle Power Attacks of HQC on FPGAs

The National Institute of Standards and Technology recently selected Hamming Quasi-Cyclic (HQC) as a critical code-based alternative for post-quantum cryptography. Hardware architectures like FPGAs successfully mitigate the severe performance bottlenecks of HQC software deployments. However, their physical security remains largely unexplored. It is often assumed that the massive concurrency and systemic electrical noise of FPGAs provide a natural barrier against side-channel analysis. In this paper, we challenge this assumption. We present the first end-to-end full decryption (FD) style power attack against a parallel FPGA implementation of HQC. Unlike Cortex-M4 software, where leakage in Reed-Muller (RM) decoding manifests as sharp, localized peaks, FPGA signals are inherently weaker and broadly distributed across the second half of the pipelined RM decoding phase. To overcome this challenging signal-to-noise ratio, we refine our methodology. Rather than attempting to predict full RM decoding outputs, we construct a “yes/no” oracle for each individual decoding block. This approach exploits the decoder's parallelism to recover independent chunks of the secret simultaneously. Our practical evaluations demonstrate high efficiency: an adversary can recover the secret key with a 58% success rate using merely 120 FPGA power traces. In this setting, we employ an optimized Soft-ISD solver and strictly bound the post-processing complexity to just 30 minutes on a Mac computer. This work highlights the urgent need to design and integrate robust hardware masking schemes for HQC.