Batch Bayesian Optimization for Minimizing IPN in RF PLLs

Minimizing integrated phase noise (IPN) in RF phase-locked loops (PLLs) is critical to spectral purity and system-level performance, yet post-fabrication tuning relies on expensive measurements over discrete trimming codes, making exhaustive search impractical. Therefore, sample-efficient optimization is essential, especially when instrumentation time is limited and the configuration space is large. This study investigates batch Bayesian optimization (BO) with batch expected improvement for minimizing IPN of RF PLLs under discrete trimming codes and expensive measurements. Although parallel test resources typically drive batch BO, we considered a single-device-under-test setup in which q candidates were queued and sequentially measured. We evaluated performance as a function of the total number of physical measurements B, comparing it against sequential BO and genetic algorithms across three PLL boards. For small B, a moderate batch size accelerated IPN reduction and improved tail behavior. At larger B, the mean performance of batch BO was comparable to that of sequential BO. However, batch BO retained a tail-performance advantage on certain boards. Additionally, within batch BO, we observed a non-monotonic effect of the batch size q. Specifically, moderate batch sizes improved early progress, whereas excessively large q degraded performance due to selecting all batch candidates simultaneously without using intermediate measurement feedback. These results suggest that appropriate batch-size selection can reduce the number of measurements required to achieve a target IPN, making batch BO particularly attractive under constrained measurement budgets.

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Publication Details

Journal
JSTS Journal of Semiconductor Technology and Science
Published
2026-10-22
DOI
https://doi.org/10.5573/jsts.2026.26.5.327
Primary Topic
Advancements in PLL and VCO Technologies
Type
article
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article

Batch Bayesian Optimization for Minimizing IPN in RF PLLs

최동용, Kuduck Kwon, Kabseok Ko, In-Chul Hwang et al.
JSTS Journal of Semiconductor Technology and Science
Advancements in PLL and VCO Technologies
article

Batch Bayesian Optimization for Minimizing IPN in RF PLLs

최동용, Kuduck Kwon, Kabseok Ko, In-Chul Hwang, Seungyoung Park, Jungmin Kwon, Jonghoon Park
article en

Abstract

Minimizing integrated phase noise (IPN) in RF phase-locked loops (PLLs) is critical to spectral purity and system-level performance, yet post-fabrication tuning relies on expensive measurements over discrete trimming codes, making exhaustive search impractical. Therefore, sample-efficient optimization is essential, especially when instrumentation time is limited and the configuration space is large. This study investigates batch Bayesian optimization (BO) with batch expected improvement for minimizing IPN of RF PLLs under discrete trimming codes and expensive measurements. Although parallel test resources typically drive batch BO, we considered a single-device-under-test setup in which q candidates were queued and sequentially measured. We evaluated performance as a function of the total number of physical measurements B, comparing it against sequential BO and genetic algorithms across three PLL boards. For small B, a moderate batch size accelerated IPN reduction and improved tail behavior. At larger B, the mean performance of batch BO was comparable to that of sequential BO. However, batch BO retained a tail-performance advantage on certain boards. Additionally, within batch BO, we observed a non-monotonic effect of the batch size q. Specifically, moderate batch sizes improved early progress, whereas excessively large q degraded performance due to selecting all batch candidates simultaneously without using intermediate measurement feedback. These results suggest that appropriate batch-size selection can reduce the number of measurements required to achieve a target IPN, making batch BO particularly attractive under constrained measurement budgets.

JSTS Journal of Semiconductor Technology and ScienceVol. 26(5)
Industry, innovation and infrastructure
Openalex Percentile: Top 23%
Advancements in PLL and VCO Technologies
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Batch Bayesian Optimization for Minimizing IPN in RF PLLs — 최동용, Kuduck Kwon, et al. · JSTS Journal of Semiconductor Technology and Science (2026) | TGRS Research Map | TGRS