Fabrication and Device-Aware Simulation of Vertical 3D PCM for Fully Analog Equilibrium Propagation

Analog in-memory computing (AIMC) offers a promising route to overcome the von Neumann bottleneck, but per-layer analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) remain a major overhead, particularly in vertical 3D structures where converter circuitry is required at each stacked layer. This work proposes a fully analog EqProp framework in which phase-change memory (PCM) devices serve as resistive synapses and Ovonic Threshold Switch (OTS) devices serve as non-linear neurons within a common vertical 3D stack, thereby eliminating layer-wise ADC/DAC interfaces. To validate this concept, vertical 3D PCM and OTS devices were fabricated and electrically characterized. The fabricated PCM demonstrates stable switching with an on/off ratio exceeding two orders of magnitude across all four layers and multilevel conductance modulation suitable for analog weight representation, with drift coefficients consistent with previously reported GST values. The OTS device achieves enhanced subthreshold non-linearity through intentional electroforming while preserving threshold switching. Incorporating the measured device characteristics into a device-aware simulation, XOR experiments confirm the feasibility of the 3D PCM-OTS architecture for the analog EqProp framework. For MNIST classification based on PCM synaptic characteristics, the fabricated PCM ensures sufficient accuracy. Furthermore, inference analysis under multiplicative conductance noise and resistance drift demonstrates that the EqProp framework maintains limited accuracy degradation under PCM synaptic non-idealities. A first-order architectural estimate shows comparable analog-core efficiency and highlights the potential system-level benefit of eliminating intermediate ADC/DAC conversions. Overall, this work suggests that vertical 3D PCM-OTS co-integration combined with the EqProp framework is a promising pathway toward fully analog AIMC without ADC/DAC overhead.

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Publication Details

Journal
JSTS Journal of Semiconductor Technology and Science
Published
2026-10-22
DOI
https://doi.org/10.5573/jsts.2026.26.5.415
Primary Topic
Advanced Memory and Neural Computing
Type
article
Field-Weighted Citation Impact
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article

Fabrication and Device-Aware Simulation of Vertical 3D PCM for Fully Analog Equilibrium Propagation

Sangbum Kim, Dongmin Han, Youngsoo Choi, Hoonroe Lee et al.
JSTS Journal of Semiconductor Technology and Science
Advanced Memory and Neural Computing
article

Fabrication and Device-Aware Simulation of Vertical 3D PCM for Fully Analog Equilibrium Propagation

Sangbum Kim, Dongmin Han, Youngsoo Choi, Hoonroe Lee, Hyunjo Hwang, Minsik Yoon, Jehyun Chun, Donghoon Kang
article en

Abstract

Analog in-memory computing (AIMC) offers a promising route to overcome the von Neumann bottleneck, but per-layer analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) remain a major overhead, particularly in vertical 3D structures where converter circuitry is required at each stacked layer. This work proposes a fully analog EqProp framework in which phase-change memory (PCM) devices serve as resistive synapses and Ovonic Threshold Switch (OTS) devices serve as non-linear neurons within a common vertical 3D stack, thereby eliminating layer-wise ADC/DAC interfaces. To validate this concept, vertical 3D PCM and OTS devices were fabricated and electrically characterized. The fabricated PCM demonstrates stable switching with an on/off ratio exceeding two orders of magnitude across all four layers and multilevel conductance modulation suitable for analog weight representation, with drift coefficients consistent with previously reported GST values. The OTS device achieves enhanced subthreshold non-linearity through intentional electroforming while preserving threshold switching. Incorporating the measured device characteristics into a device-aware simulation, XOR experiments confirm the feasibility of the 3D PCM-OTS architecture for the analog EqProp framework. For MNIST classification based on PCM synaptic characteristics, the fabricated PCM ensures sufficient accuracy. Furthermore, inference analysis under multiplicative conductance noise and resistance drift demonstrates that the EqProp framework maintains limited accuracy degradation under PCM synaptic non-idealities. A first-order architectural estimate shows comparable analog-core efficiency and highlights the potential system-level benefit of eliminating intermediate ADC/DAC conversions. Overall, this work suggests that vertical 3D PCM-OTS co-integration combined with the EqProp framework is a promising pathway toward fully analog AIMC without ADC/DAC overhead.

JSTS Journal of Semiconductor Technology and ScienceVol. 26(5)
Openalex Percentile: Top 24%
Advanced Memory and Neural Computing
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