Breaking the Boltzmann Limit: A Review of Emerging Ultralow‐Power Transistor Technologies

ABSTRACT As complementary metal‐oxide‐semiconductor (CMOS) technology scales down to the sub‐2 nm node, the dramatic surge in power density has emerged as a fundamental bottleneck. Conventional metal‐oxide‐semiconductor field‐effect transistors (MOSFETs) are constrained by the 60 mV/dec Boltzmann thermal limit, rendering further supply voltage reduction exceedingly challenging. To surmount this fundamental limit, various novel sub‐60 mV/dec steep‐switching devices have been proposed, including tunnel field‐effect transistors (TFETs), negative‐capacitance field‐effect transistors (NCFETs), and cold‐source field‐effect transistors (CSFETs). A comprehensive review of the evolution of sub‑60 mV/dec technologies is presented, with particular emphasis on the three mainstream approaches: TFETs, NCFETs, and CSFETs. The underlying physical principles, recent research advances, optimization strategies, and remaining challenges of these devices are thoroughly analyzed. Finally, prospective directions for future breakthroughs are discussed, encompassing novel materials exploration, the synergistic integration of multiple physical mechanisms, and the experimental verification of integration with advanced CMOS nodes.