A 6–11-GHz GaAs pHEMT Low-Noise Amplifier with an Integrated Limiter

This paper presents a 6–11 GHz monolithic microwave integrated circuit (MMIC) low-noise amplifier (LNA) with an integrated input limiter for broadband microwave receiver protection. The proposed limiter–LNA employs a three-stage common-source topology and an anti-parallel diode pair at the radio frequency (RF) input, and it is fabricated using a 0.25 μm GaAs pHEMT process. The limiter–LNA achieves a gain of 24.6–28.0 dB and a noise figure of 1.19–1.80 dB while consuming 34 mA from a 3.0 V supply in measurement. Its saturated output power is 12–13 dBm, with input and output third-order intercept points of −8 and 20 dBm, respectively. To evaluate the effect of the integrated limiter, the measurement results are compared with those of a standalone LNA employing the same amplifier topology. The main contribution is the realization of a favorable trade-off between limiter simplicity and broadband LNA performance using only a simple anti-parallel Schottky-diode pair, together with a direct experimental evaluation of the limiter-induced performance penalty and protection benefit. The comparison shows that the limiter introduces only a minor noise-figure penalty. High-input-power testing showed that the maximum input-power level without permanent characteristic changes increased from approximately 24 dBm for the standalone LNA to 29 dBm for the limiter–LNA. These results demonstrate that the integrated limiter improves the input-power survivability of the LNA while preserving its broadband gain and low-noise performance. The fabricated limiter–LNA occupies a chip dimension of 1.222 × 1.200 mm2.

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Publication Details

Journal
Electronics
Published
2026-10-16
DOI
https://doi.org/10.3390/electronics15204771
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
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article

A 6–11-GHz GaAs pHEMT Low-Noise Amplifier with an Integrated Limiter

Gwanghyeon Jeong, Jaehun Lee, Dong‐Ho Lee, Ishath Harshika Hewa Maddumage et al.
Electronics
Radio Frequency Integrated Circuit Design
article

A 6–11-GHz GaAs pHEMT Low-Noise Amplifier with an Integrated Limiter

Gwanghyeon Jeong, Jaehun Lee, Dong‐Ho Lee, Ishath Harshika Hewa Maddumage, Jiyoung Lee
article en

Abstract

This paper presents a 6–11 GHz monolithic microwave integrated circuit (MMIC) low-noise amplifier (LNA) with an integrated input limiter for broadband microwave receiver protection. The proposed limiter–LNA employs a three-stage common-source topology and an anti-parallel diode pair at the radio frequency (RF) input, and it is fabricated using a 0.25 μm GaAs pHEMT process. The limiter–LNA achieves a gain of 24.6–28.0 dB and a noise figure of 1.19–1.80 dB while consuming 34 mA from a 3.0 V supply in measurement. Its saturated output power is 12–13 dBm, with input and output third-order intercept points of −8 and 20 dBm, respectively. To evaluate the effect of the integrated limiter, the measurement results are compared with those of a standalone LNA employing the same amplifier topology. The main contribution is the realization of a favorable trade-off between limiter simplicity and broadband LNA performance using only a simple anti-parallel Schottky-diode pair, together with a direct experimental evaluation of the limiter-induced performance penalty and protection benefit. The comparison shows that the limiter introduces only a minor noise-figure penalty. High-input-power testing showed that the maximum input-power level without permanent characteristic changes increased from approximately 24 dBm for the standalone LNA to 29 dBm for the limiter–LNA. These results demonstrate that the integrated limiter improves the input-power survivability of the LNA while preserving its broadband gain and low-noise performance. The fabricated limiter–LNA occupies a chip dimension of 1.222 × 1.200 mm2.

ElectronicsVol. 15(20)
Hanbat National University (KR), Naver (South Korea) (KR)
Openalex Percentile: Top 23%
Radio Frequency Integrated Circuit Design
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