Neuromorphic Computing and Spiking Neural Networks (SNNs) for Ultra-Low-Power Edge Intelligence: Architectures, Learning Paradigms, and Silicon Benchmarks

Abstract—The continuous scaling of conventional Deep Neural Networks (DNNs) on classical Von Neumann architectures has reached severe physical boundaries governed by the 'memory wall' and unsustainable thermal dissipation. Battery-constrained edge computing environments—including autonomous micro-robotics, bio-implantable telemetry, and space-borne remote sensing—demand continuous, milliwatt-scale machine perception that standard GPUs and digital tensor accelerators cannot deliver. Neuromorphic Computing and Spiking Neural Networks (SNNs) establish an alternative non-Von Neumann computing paradigm inspired by biological neurobiology, processing information via sparse, event-driven temporal spikes rather than dense, continuous matrix multiplications. However, deploying high-performance SNNs across resource-constrained edge hardware introduces profound foundational challenges: non-differentiable threshold activation dynamics that complicate gradient-based training, temporal latency vs. spike sparsity trade-offs, and microarchitectural fragmentation across asynchronous neuromorphic silicon. This paper delivers an exhaustive, mathematically formal technical investigation and empirical benchmark of neuromorphic computing for ultra-low-power edge intelligence. We formalize the non-linear differential dynamics of Leaky Integrate-and-Fire (LIF) and Adaptive Exponential (AdEx) neuron models, derive the mathematical formulations of surrogate gradient backpropagation through time (BPTT), and analyze ANN-to-SNN rate-conversion bounds. Furthermore, we construct an empirical hardware testbed benchmarking neuromorphic silicon platforms (Intel Loihi 2 and SynSense Speck) against state-of-the-art edge accelerators (NVIDIA Jetson Orin Nano and Google Coral Edge TPU) across neuromorphic vision (DVS-Gesture, N-MNIST) and real-time edge bio-signal classification (MIT-BIH Arrhythmia). Our experimental findings demonstrate that event-driven SNN execution on neuromorphic silicon achieves up to a 42.6x reduction in dynamic energy consumption over edge GPUs while maintaining competitive classification accuracy (within 0.8% of floating-point DNN baselines) and sub-10ms inference latencies. Finally, we formulate open research directions in memristive in-memory computing crossbars, on-chip continuous spike-timing-dependent plasticity (STDP), and hybrid large-scale neuromorphic foundation models.

Authors

Publication Details

Journal
Zenodo (CERN European Organization for Nuclear Research)
Published
2026-10-15
DOI
https://doi.org/10.5281/zenodo.23389715
Primary Topic
Advanced Memory and Neural Computing
Type
article
Field-Weighted Citation Impact
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article

Neuromorphic Computing and Spiking Neural Networks (SNNs) for Ultra-Low-Power Edge Intelligence: Architectures, Learning Paradigms, and Silicon Benchmarks

Vishal Shrivastava, Vibhakar Pathak, Tanish Mudgal, Priyanshu Dahiya
Zenodo (CERN European Organization for Nuclear Research)
Advanced Memory and Neural Computing
article

Neuromorphic Computing and Spiking Neural Networks (SNNs) for Ultra-Low-Power Edge Intelligence: Architectures, Learning Paradigms, and Silicon Benchmarks

Vishal Shrivastava, Vibhakar Pathak, Tanish Mudgal, Priyanshu Dahiya
article en

Abstract

Abstract—The continuous scaling of conventional Deep Neural Networks (DNNs) on classical Von Neumann architectures has reached severe physical boundaries governed by the 'memory wall' and unsustainable thermal dissipation. Battery-constrained edge computing environments—including autonomous micro-robotics, bio-implantable telemetry, and space-borne remote sensing—demand continuous, milliwatt-scale machine perception that standard GPUs and digital tensor accelerators cannot deliver. Neuromorphic Computing and Spiking Neural Networks (SNNs) establish an alternative non-Von Neumann computing paradigm inspired by biological neurobiology, processing information via sparse, event-driven temporal spikes rather than dense, continuous matrix multiplications. However, deploying high-performance SNNs across resource-constrained edge hardware introduces profound foundational challenges: non-differentiable threshold activation dynamics that complicate gradient-based training, temporal latency vs. spike sparsity trade-offs, and microarchitectural fragmentation across asynchronous neuromorphic silicon. This paper delivers an exhaustive, mathematically formal technical investigation and empirical benchmark of neuromorphic computing for ultra-low-power edge intelligence. We formalize the non-linear differential dynamics of Leaky Integrate-and-Fire (LIF) and Adaptive Exponential (AdEx) neuron models, derive the mathematical formulations of surrogate gradient backpropagation through time (BPTT), and analyze ANN-to-SNN rate-conversion bounds. Furthermore, we construct an empirical hardware testbed benchmarking neuromorphic silicon platforms (Intel Loihi 2 and SynSense Speck) against state-of-the-art edge accelerators (NVIDIA Jetson Orin Nano and Google Coral Edge TPU) across neuromorphic vision (DVS-Gesture, N-MNIST) and real-time edge bio-signal classification (MIT-BIH Arrhythmia). Our experimental findings demonstrate that event-driven SNN execution on neuromorphic silicon achieves up to a 42.6x reduction in dynamic energy consumption over edge GPUs while maintaining competitive classification accuracy (within 0.8% of floating-point DNN baselines) and sub-10ms inference latencies. Finally, we formulate open research directions in memristive in-memory computing crossbars, on-chip continuous spike-timing-dependent plasticity (STDP), and hybrid large-scale neuromorphic foundation models.

Zenodo (CERN European Organization for Nuclear Research)
Openalex Percentile: Top 23%
Advanced Memory and Neural Computing
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