A LOW-POWER HYBRID CURRENT-STEERING AND DIGITAL CONTROL ARCHITECTURE FOR TUNABLE UWB SYSTEM

Abstract This work presents a hybrid current-steering and digital control architecture for low-power and tunable signal generation in 0.18 µm CMOS technology. The proposed design integrates an analog current-steering modulation core with digitally programmable control logic to achieve efficient and flexible operation. By combining the high efficiency of current-mode signal generation with fine-grained digital tuning, the architecture gives users the ability to precisely manage output characteristics, including parameters such as pulse duration and amplitude. A current-steering inverter was driven by an input voltage between 700 mV and 1400 mV; accordingly, the pulse width varied from 96 ps to 153 ps. The proposed IR-UWB employs a baseband signalling approach, simplifying circuit design and reducing power consumption. The proposed IR-UWB transmitter was implemented in Cadence Virtuoso. It integrates an On-Off Keying (OOK) circuit that enhances energy efficiency and operates between 6.17 and 9.10 GHz. The transmitter delivers an output swing of 25 mV at a 1 MHz Pulse Repetition Frequency (PRF) and supports a maximum PRF of up to 1 GHz. It consumes 8.3 mW at a 1 GHz PRF, making it highly suitable for battery-powered and energy-constrained Wireless Sensor Nodes (WSN). The total noise measured was 2.4832e-19 V2/Hz. Keywords: Current-steering, digital control, low power, OOK, CMOS