Design, Noise Modelling, and Performance Analysis of a GaAs pHEMT Low Noise Amplifier for Sub-6 GHz Receiver Front-Ends

This paper presents a systematic simulation-based design and performance analysis of a gallium arsenide pseudomorphic high-electron-mobility transistor (GaAs pHEMT) low-noise amplifier (LNA) for noise-sensitive RF receiver front-end applications. The proposed design methodology combines device characterization, DC bias optimization, small-signal modelling, correlated noise analysis, impedance matching, and stability evaluation. An Avago ATF34143 GaAs pHEMT is investigated using Keysight Advanced Design System (ADS), with particular emphasis on the Pospieszalski noise model and noise-optimized input matching. Unlike conventional power-matching approaches, the input network is designed toward the optimum source reflection coefficient to reduce the minimum achievable noise figure, while the output network is optimized to provide adequate forward gain and effective impedance transformation. Inductive source degeneration is incorporated to improve input impedance control and amplifier stability. Simulation results demonstrate a minimum noise figure of approximately 0.91 dB at 5.9 GHz, with forward gain exceeding 10 dB and unconditional stability over the investigated operating range. At 7.2 GHz, the amplifier maintains a noise figure of approximately 1.08 dB and a forward gain of 8.06 dB, indicating the frequency-dependent trade-off between gain, noise performance, and parasitic effects. The results confirm that a bias-aware, noise-model-based design approach can provide a practical foundation for developing low-noise GaAs pHEMT receiver front ends. Since the present work is based on circuit-level simulation, fabrication and experimental measurement remain important directions for future validation.