FPGA-based Power & EM Side-Channel Cryptanalysis on GIFT-128 and Development of secure Trojan-free physical design for GIFT-128 with minimized transistors
The rapidly evolving field of the Internet of Things revolves around the transmission of data through wired or wireless networks. A crucial aspect within this domain is ensuring the security of the data being transmitted within optimal timeframes. PRESENT is a well-known lightweight cryptosystem for wireless communication. GIFT is an improved version of it. It is designed to optimize throughput. This paper presents the hardware implementation of the GIFT cipher on an FPGA, including simulation with a testbed. The process involves the generation of random plaintext and keys, which are inputs to the cipher, followed by conducting power leakage analysis and electromagnetic (EM) leakage analysis on GIFT. Subsequently, based on these analyses, a secure Trojan-free VLSI Physical design of GIFT has been presented. The paper also outlines the schematic designs of the GIFT cipher, along with the verification of layout and simulation results.
Authors
- Neelima Guntupalli
- G. Padmavathi (ORCID: https://orcid.org/0000-0001-8228-2694)
- Nagendar Yerukala (ORCID: https://orcid.org/0000-0002-2910-8619)
- Sriramudu Sriramudu
Institutions
- Acharya Nagarjuna University (IN)
- CR Rao Advanced Institute of Mathematics, Statistics and Computer Science (IN)
Publication Details
- Journal
- WSEAS Transactions on Computers archive
- Published
- 2026-10-12
- DOI
- https://doi.org/10.37394/23205.2026.25.17
- Primary Topic
- Cryptographic Implementations and Security
- Type
- article
- Field-Weighted Citation Impact
- 0.00