ByPASS: Selective Cache Bypassing of Host Writes in Computational Solid-state Drives

Computational solid-state drives ( CompSSDs ) are evolving into intelligent storage solutions that integrate near-data computing architectures to achieve computation-storage convergence. They can reduce the overhead of data migration and then accelerate the execution of data-centric workloads through in-situ processing. In the context of CompSSDs , the data cache must buffer both host-side output data and SSD -side input data, making efficient cache management a critical challenge. Existing cache partitioning approaches for CompSSDs typically assume mandatory caching of all host-side writes, resulting in cache pollution from cold data and severe resource contention. To address this issue, this paper proposes ByPASS , a novel cache management scheme that dynamically co-optimizes write bypass and cache partitioning through periodic runtime decisions. Specifically, at each decision window, ByPASS analyzes I/O access patterns, cache hit ratios, and host- CompSSD transfer latency, to determine a unified policy for the current time window, either bypass all host writes directly to NAND flash or dynamically adjust the cache allocation ratio between host writes and CompSSD task inputs. We implement ByPASS in the MQSim simulator and evaluate its effectiveness by replaying I/O traces from real-world applications. Our proposal can reduce I/O response time by 6.4% – 34.1% , in contrast to state-of-the-art cache management schemes.