Mitigation of bipolar degradation in 4H-SiC power devices using engineered SiC substrates

Bipolar degradation caused by the expansion of single Shockley stacking faults (1SSFs) from basal plane dislocations remains a major reliability issue in 4H-SiC power devices. In this study, the effectiveness of SiC bonded wafers in suppressing stacking-fault expansion was investigated using PiN diodes fabricated on conventional bulk 4H-SiC and engineered SiC substrates with two different polycrystalline 3C-SiC handle wafers. Current–voltage characteristics, electroluminescence (EL), secondary ion mass spectrometry, and cathodoluminescence (CL) measurements were performed before and after pulsed-current stress test. The engineered SiC samples exhibited lower series resistance than the conventional bulk SiC samples while maintaining stable electrical characteristics. EL observations revealed that the density of expanded 1SSFs in the engineered SiC samples was reduced to approximately one-third of that in the bulk SiC samples, demonstrating significant mitigation of bipolar degradation. No noticeable difference was observed between the two types of handle wafers. CL measurements further detected implantation-induced L 1 luminescence originating from the transferred layer, indicating that point defects introduced by H + implantation during the SmartCut™ process remained after device fabrication. These point defects are considered to suppress stacking-fault expansion during bipolar operation. The results demonstrate that SiC bonded wafers provide an industrial approach for suppressing bipolar degradation in 4H-SiC power devices without requiring high-energy ion implantation.