AI-Based Image Enhancement Improves Detection of Interconnect Defects in Microelectronic Packaging
Abstract Traditional failure-analysis (FA) methods face growing challenges due to the increasing miniaturization and complexity of modern semiconductor devices. In particular, the detection of cracks in the extreme low K layers of flip-chips, utilized in advanced packaging architectures at the back end of line (BEOL), is challenging. To improve detectability of these so-called “white bumps”, we propose an AI-based image-enhancement workflow, specifically tailored to improve scanning acoustic microscopy (SAM) images. By applying a deep CNN with skip connections and network in network (DCSCN) model to low-resolution C-scan SAM images, we are able to improve the perceptual quality of images. Furthermore, this approach boosts resolution-dependent analysis methods like AI-based object detection of white-bump defects, improving the recall from 5.2% (95% CI: 0.1–26.0%) to 100.0% (95% CI: 82.2–100.0%). Our work demonstrates that AI-based image enhancement can significantly improve FA workflows, offering a robust and efficient solution for modern semiconductor analysis.
Authors
- Peter Czurratis
- Hsien-Wei Ho
- Roland Brunner (ORCID: https://orcid.org/0000-0002-0079-3288)
- Tatjana Djuric-Rissner
- Raphael Wilhelmer (ORCID: https://orcid.org/0009-0005-0175-4239)
- Chun-Hsien Lee
- Chun-Liang Kuo
Institutions
- Advanced Semiconductor Engineering (Taiwan) (TW)
- PVA TePla (Germany) (DE)
- Materials Center Leoben (Austria) (AT)
Publication Details
- Journal
- Journal of Failure Analysis and Prevention
- Published
- 2026-10-05
- DOI
- https://doi.org/10.1007/s11668-026-02537-z
- Primary Topic
- Integrated Circuits and Semiconductor Failure Analysis
- Type
- article
- Field-Weighted Citation Impact
- 0.00