ATAN: A hybrid graph neural network framework for accelerating aging-aware timing analysis

CMOS device aging critically challenges digital circuit design, where conventional timing analysis struggles with the large number of input conditions, standard cells, and process corners. This work proposes ATAN, a novel framework for accelerating aging-aware timing analysis, employing a hybrid graph neural network. Synergistically combining a relational graph convolutional network and a graph attention network, the unique dual-branch framework captures complementary structural timing information and aging-sensitive variations for accurate aging-aware delay prediction. Integrated few-shot learning enables rapid adaptation to unseen standard cells and corners with minimal samples. Simulation results demonstrate that ATAN reduces prediction error by 5% to 28% compared with representative aging-aware delay prediction methods while achieving over 600× speedup for single-condition delay inference compared with SPICE simulations. The framework enables efficient few-shot adaptation to new scenarios, drastically reducing the required data and fine-tuning cost. ATAN achieves SPICE-comparable accuracy with substantially reduced computational cost, offering an efficient and scalable solution for reliability-centric design.