Iso-Damped Symmetric Fractional-Order Proportional-Integral-Derivative Control Using a Single Add-Differentiate Integrated Circuit Topology and Constant-Phase-Element Retuning

Abstract A fractional-order extension of a single Add-Differentiate Integrated Circuit (AD-IC) based proportional-integral-derivative (PID) controller is presented. The reference AD-IC topology realizes voltage-mode and current-mode integer-order PID controllers using a single active element, two resistors, and two capacitors. In this study, the voltage-mode realization is generalized by replacing the matched capacitive elements with constant phase element (CPE) operators of common order $$\alpha $$ α , producing a symmetric fractional $$\hbox {PI}^{\alpha }\hbox {D}^{\alpha }$$ PI α D α controller. The integer-order reference design is reconstructed, and direct fractional substitution at the original $$Q=80$$ Q = 80 pF-equivalent scale is shown to destabilize all tested fractional cases. The instability arises because the original value is no longer compatible with the altered magnitude and phase characteristics introduced by the fractional-order CPE elements. A one-parameter retuning method is therefore introduced, where the CPE pseudo-capacitance scale $$Q_{\textrm{opt}}(\alpha )$$ Q opt ( α ) is selected to recover the reference phase margin (PM). With a ninth-order Oustaloup approximation, the retuned fractional controllers reduce settling time by up to 62.07% under equal phase margin. Under the stricter equal-phase-margin and equal-gain-crossover comparison, the settling-time improvement remains 27.37%, showing that the benefit is not solely caused by increased bandwidth. Robustness analysis further shows that the phase-margin standard deviation under plant-gain variation is reduced by 93.40% for $$\alpha =0.5$$ α = 0.5 , while all simulated Monte Carlo cases remained closed-loop stable within the tested component, CPE, and plant uncertainty ranges. Finally, LTspice simulations agree closely with MATLAB for the integer-order and $$\alpha =0.5$$ α = 0.5 fractional designs, supporting the theoretical findings.

Authors

Publication Details

Journal
Circuits Systems and Signal Processing
Published
2026-10-03
DOI
https://doi.org/10.1007/s00034-026-03814-w
Primary Topic
Advanced Control Systems Design
Type
article
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article

Iso-Damped Symmetric Fractional-Order Proportional-Integral-Derivative Control Using a Single Add-Differentiate Integrated Circuit Topology and Constant-Phase-Element Retuning

Elham Minayi, Yiğit Aydoğan
Circuits Systems and Signal Processing
Advanced Control Systems Design
article

Iso-Damped Symmetric Fractional-Order Proportional-Integral-Derivative Control Using a Single Add-Differentiate Integrated Circuit Topology and Constant-Phase-Element Retuning

Elham Minayi, Yiğit Aydoğan
article en

Abstract

Abstract A fractional-order extension of a single Add-Differentiate Integrated Circuit (AD-IC) based proportional-integral-derivative (PID) controller is presented. The reference AD-IC topology realizes voltage-mode and current-mode integer-order PID controllers using a single active element, two resistors, and two capacitors. In this study, the voltage-mode realization is generalized by replacing the matched capacitive elements with constant phase element (CPE) operators of common order $$\alpha $$ α , producing a symmetric fractional $$\hbox {PI}^{\alpha }\hbox {D}^{\alpha }$$ PI α D α controller. The integer-order reference design is reconstructed, and direct fractional substitution at the original $$Q=80$$ Q = 80 pF-equivalent scale is shown to destabilize all tested fractional cases. The instability arises because the original value is no longer compatible with the altered magnitude and phase characteristics introduced by the fractional-order CPE elements. A one-parameter retuning method is therefore introduced, where the CPE pseudo-capacitance scale $$Q_{\textrm{opt}}(\alpha )$$ Q opt ( α ) is selected to recover the reference phase margin (PM). With a ninth-order Oustaloup approximation, the retuned fractional controllers reduce settling time by up to 62.07% under equal phase margin. Under the stricter equal-phase-margin and equal-gain-crossover comparison, the settling-time improvement remains 27.37%, showing that the benefit is not solely caused by increased bandwidth. Robustness analysis further shows that the phase-margin standard deviation under plant-gain variation is reduced by 93.40% for $$\alpha =0.5$$ α = 0.5 , while all simulated Monte Carlo cases remained closed-loop stable within the tested component, CPE, and plant uncertainty ranges. Finally, LTspice simulations agree closely with MATLAB for the integer-order and $$\alpha =0.5$$ α = 0.5 fractional designs, supporting the theoretical findings.

Circuits Systems and Signal Processing
Openalex Percentile: Top 16%
Advanced Control Systems Design
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Iso-Damped Symmetric Fractional-Order Proportional-Integral-Derivative Control Using a Single Add-Differentiate Integrated Circuit Topology and Constant-Phase-Element Retuning — Elham Minayi, Yiğit Aydoğan · Circuits Systems and Signal Processing (2026) | TGRS Research Map | TGRS