Power-Efficient FPGA-Based Elliptic Curve Cryptography: A Comparative Study of Multiplier Architectures

Abstract—Elliptic Curve Cryptography (ECC) is widely adopted in resource-constrained and mobile environments because it provides RSA-equivalent security at substantially smaller key sizes, reducing computation, memory, and power overhead. Since scalar point multiplication is the dominant cost in ECC and is itself built on modular multiplication, the choice of multiplier architecture directly determines the energy efficiency of an ECC hardware core. This paper investigates the effect of four multiplier architectures — Montgomery, Vedic, Baugh-Wooley, and Booth — on the power consumption of an FPGA-based ECC implementation. Each multiplier is first characterized in isolation, and the Montgomery multiplier is then integrated into a complete ECC point-multiplication datapath and implemented on [FPGA device/family] using Xilinx Vivado. Simulation results show that the Montgomery-based design consumes 338.739 W total on-chip power, while achieving correct encryption/decryption behaviour verified against a representative test input. Integration challenges encountered with the Vedic, Baugh-Wooley, and Booth multipliers within the ECC datapath are also reported, along with the standalone power profile of each. These results identify Montgomery multiplication as the most power-efficient choice for lightweight ECC hardware among the architectures evaluated and outline the remaining integration work needed for a complete four-way comparison. Keywords—Elliptic Curve Cryptography (ECC), Field Programmable Gate Array (FPGA), Montgomery multiplier, Vedic multiplier, Baugh-Wooley multiplier, Booth multiplier, power consumption, public key, private key.