TrustSpec : Simulation‐Grounded Physics‐Driven Spectral Inversion With Uncertainty Quantification for SiC Epitaxial Thickness Metrology

ABSTRACT Accurate thickness metrology is essential for silicon carbide (SiC) epitaxial layers, yet classical Fourier‐transform infrared (FTIR) fringe analysis relies on artifact‐specific preprocessing, degrades below the fringe‐resolution limit, and provides no calibrated confidence for individual measurements. This paper presents TrustSpec, a simulation‐grounded, physics‐driven spectral inversion framework intended as a proof of concept for trustworthy SiC epitaxial thickness metrology. A dispersive two‐interface interference model with randomized instrument disturbances is used as a spectral digital twin to generate labeled training spectra, and the same twin is reused at inference time as an analysis‐by‐synthesis referee. A deep ensemble estimates thickness from a physics‐conjugate Fourier‐magnitude optical‐thickness representation; the ensemble sample standard deviation and a windowed re‐synthesis consistency ratio define a two‐channel trust plane for release, review, or rejection. In a reproducible simulation study over 0.4–25 μm, TrustSpec achieves a mean absolute error (MAE) of 0.110 μm and remains effective below 1 μm, where a classical FFT pipeline fails. Split‐conformal recalibration yields 94.6% empirical coverage for a nominal 95% interval. The combined trust policy releases 90.5% of in‐distribution spectra at an MAE of 0.066 μm and rejects all 600 tested simulated 28–38 μm thickness‐extrapolation spectra; a 25–28 μm test shows a gradual rejection transition near the training boundary. Channel ablations, referee‐window sensitivity, shifted‐nuisance stress tests, and model‐mismatch experiments delimit the scope of these simulation results and motivate batch residual monitoring, reference‐wafer checks, and periodic two‐angle acquisition for drift detection. Validation on measured SiC wafers remains necessary before production deployment.

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Publication Details

Journal
Engineering Reports
Published
2026-09-30
DOI
https://doi.org/10.1002/eng2.71088
Primary Topic
Silicon Carbide Semiconductor Technologies
Type
article
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article

TrustSpec : Simulation‐Grounded Physics‐Driven Spectral Inversion With Uncertainty Quantification for SiC Epitaxial Thickness Metrology

Zijie Nie, Qingjie Guo, Shunlin Yang
Engineering Reports
Silicon Carbide Semiconductor Technologies
article

TrustSpec : Simulation‐Grounded Physics‐Driven Spectral Inversion With Uncertainty Quantification for SiC Epitaxial Thickness Metrology

Zijie Nie, Qingjie Guo, Shunlin Yang
article en

Abstract

ABSTRACT Accurate thickness metrology is essential for silicon carbide (SiC) epitaxial layers, yet classical Fourier‐transform infrared (FTIR) fringe analysis relies on artifact‐specific preprocessing, degrades below the fringe‐resolution limit, and provides no calibrated confidence for individual measurements. This paper presents TrustSpec, a simulation‐grounded, physics‐driven spectral inversion framework intended as a proof of concept for trustworthy SiC epitaxial thickness metrology. A dispersive two‐interface interference model with randomized instrument disturbances is used as a spectral digital twin to generate labeled training spectra, and the same twin is reused at inference time as an analysis‐by‐synthesis referee. A deep ensemble estimates thickness from a physics‐conjugate Fourier‐magnitude optical‐thickness representation; the ensemble sample standard deviation and a windowed re‐synthesis consistency ratio define a two‐channel trust plane for release, review, or rejection. In a reproducible simulation study over 0.4–25 μm, TrustSpec achieves a mean absolute error (MAE) of 0.110 μm and remains effective below 1 μm, where a classical FFT pipeline fails. Split‐conformal recalibration yields 94.6% empirical coverage for a nominal 95% interval. The combined trust policy releases 90.5% of in‐distribution spectra at an MAE of 0.066 μm and rejects all 600 tested simulated 28–38 μm thickness‐extrapolation spectra; a 25–28 μm test shows a gradual rejection transition near the training boundary. Channel ablations, referee‐window sensitivity, shifted‐nuisance stress tests, and model‐mismatch experiments delimit the scope of these simulation results and motivate batch residual monitoring, reference‐wafer checks, and periodic two‐angle acquisition for drift detection. Validation on measured SiC wafers remains necessary before production deployment.

Engineering ReportsVol. 8(10)
Dalian University of Technology (CN)
Openalex Percentile: Top 22%
Silicon Carbide Semiconductor Technologies
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