A Low‐Power Global Counter Based on Instantaneous Clock Transmission for SS ADC in CMOS Image Sensor

ABSTRACT This paper presents a low‐power global counter based on instantaneous clock transmission for a single‐slope analog‐to‐digital converter (SS ADC) in a CMOS image sensor. A StrongARM latch that only transmits results when the comparator flips is used in the global counter, aiming to minimize the number of toggles. Moreover, a pull‐down circuit for the StrongARM latch is employed to ensure the reliability of the latching result. The proposed global counter is designed in a 12‐bit SS ADC with a 110 nm CMOS process. The SS ADC consumes 19.4 W and has a DNL of LSB and an INL of LSB for each column at an 8 s conversion time. The simulation results show that the proposed global counter achieves a power consumption saving of about 46.5% compared to a traditional one in the dark light level and a saving of about 71.5% in the bright light level.