Novel phase-error metric for designing cascade-connected phase equalisers
The paper develops a novel error metric (rational function) for designing a high-order phase equaliser. The equaliser is an allpass system with multiple second-order (2nd-order) allpass sub-systems connected in cascade. Such a cascade system has several advantages, including insensitivity to quantisation noise as well as a high degree of modularity in hardware implementation. Based on the cascade configuration, this paper first derives the rational phase-error metric, and then shows how to use nonlinear programming to optimise the equaliser parameters. The optimisation process integrates a stability-guaranteeing procedure for ensuring the equaliser stability. To reach the optimal solution rapidly, this paper also develops a least-squares algorithm to locate a good starting point for beginning the nonlinear programming. The last part of this paper uses an example of designing a 10th-order cascade equaliser to validate the error-metric-based design. As compared to existing designs based on non-cascade structures, the simulations confirm that this new optimisation technique can produce a highly accurate allpass phase equaliser while ensuring the equaliser stability. Therefore, the rational phase-error metric acts as an essential cost function for designing a high-order allpass cascade phase equaliser, which facilitates the design formulation and also the stability guarantee of the resulting equaliser.
Authors
- Tian–Bo Deng (ORCID: https://orcid.org/0000-0002-8501-9151)
Institutions
- Toho University (JP)
Publication Details
- Journal
- International Journal of Electronics Letters
- Published
- 2026-09-16
- DOI
- https://doi.org/10.1080/21681724.2026.2735042
- Primary Topic
- Advancements in PLL and VCO Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00