DAC‐Free 64 × 64 Silicon Photonic Switch Using Two‐Level Voltage Driving

ABSTRACT We propose a two‐level voltage driving scheme enabled by post‐fabrication trimming to eliminate the need for digital‐to‐analog converters (DACs) in silicon photonic switches. The trimming method uses on‐chip high‐temperature annealing to compensate for fabrication‐induced random phase errors, allowing each switch element to be set to either the Bar or Cross state at zero bias (0 V). The complementary state is then achieved by applying the other voltage level. The proposed scheme is experimentally demonstrated using a 64 × 64 Mach–Zehnder interferometer‐based silicon thermo‐optic switch. The trimmed switch elements are driven by 0 and 3.3 V digital signals from field‐programmable gate arrays (FPGAs), with a passive resistive voltage‐divider board used to compensate for switching‐voltage differences arising from electrical packaging resistance variations. Experiments show that the 64 × 64 switch driven by the two‐level voltage driving scheme exhibits crosstalk below −15 dB. The residual crosstalk is partly attributed to trimming‐induced variations in the optimum switching voltage when the same thermo‐optic arm is used for both trimming and switching. The proposed scheme simplifies both the driving circuit and the control architecture for large‐scale silicon photonic switches.