Redefining Trust at the Memory Wall: The Threat Landscape, an Adversary Model and a Conceptual Framework for Secure Processing-in-Memory

Processing-in-Memory (PIM) architectures are transforming system hierarchies by embedding computation within memory and collapsing traditional CPU–memory separation. This co-location enables measured gains in throughput and energy efficiency for data-intensive workloads such as AI inference and graph analytics, but executing untrusted logic inside memory introduces attack surfaces that CPU-centric security models are not designed to address. Side-channel leakage, privilege escalation within PIM logic units, and tenant isolation violations are structurally enabled by the same physical proximity which makes PIM efficient. This survey examines these threats systematically, drawing on 47 systematically selected publications and supplementary references from architecture, systems security, and hardware design venues covering PIM-specific literature from 2015 onward. We developed a structured threat model that characterizes assets, attacker capabilities, and trust boundaries at subarrays and interconnect granularity for both near-bank and near-memory PIM classes. We survey and classify existing attack vectors and countermeasures, organizing them according to the architectural properties they exploit or on which they depend. Drawing on gaps identified in the surveyed literature, we propose a conceptual secure-by-design framework that locates trust enforcement within the memory substrate itself, using physical data locality, internal bandwidth constraints, and memory-disaggregation topology as enforcement primitives rather than adapting CPU-centric enclave models. This framework is a structured design proposal, not a demonstrated implementation. The threat model, defense taxonomy, and design framework constitute a reference baseline for researchers building secure PIM systems and a gap map for future experimental and formal verification.