Temporal-Window-Aware Physics-Informed Edge IDS for Multi-Class IoV Misbehavior Detection Under Ideal and Realistic BSM Observability

The Internet of Vehicles (IoV) relies on Basic Safety Messages (BSMs) for cooperative awareness, yet these broadcasts remain vulnerable to falsification, replay, flooding, Sybil-based, and motion-manipulation attacks. This paper proposes a temporal-window-aware physics-informed edge-oriented Intrusion Detection System (IDS) for 20-class IoV misbehavior detection under two simulation-based BSM observability regimes: ideal noise-free kinematics and realistic noise-inclusive observables reconstructed using the sensor-error components supplied separately by VeReMi Extension. Accordingly, “realistic” denotes a noise-inclusive simulation condition rather than real-world validation. From VeReMi Extension streams, the framework derives a compact 20-feature representation capturing kinematics, timing, replay cues, pseudonym dynamics, position-consistency residuals, zero-pattern behavior, and long-horizon motion indicators. These features are normalized with a training-only robust scaler, organized into sender-specific temporal windows, and classified using a lightweight three-layer stacked Long Short-Term Memory (LSTM) with residual temporal pooling. Four implementation variants are evaluated: dense Keras, default-optimized TensorFlow Lite, pruning-only Keras, and pruning-plus-compression TensorFlow Lite. Temporal sensitivity identifies T=40 as the best robustness–latency compromise under the realistic noise-inclusive regime. At T=40, the final pruned-and-compressed TensorFlow Lite model achieves 99.60% accuracy and 99.09% macro-F1 under ideal observability, and 99.38% accuracy and 98.67% macro-F1 under realistic noise-inclusive observability, with an 88.38 KB footprint and 0.1283 ms controlled-runtime latency. Large-scale Central Processing Unit (CPU) benchmarks on 150,000 noise-inclusive test sequences provide a platform-dependent runtime reference, with the pruned TensorFlow Lite model reaching 99.14% accuracy, 98.18% macro-F1, and 3.544 ms average latency on a multi-core Intel Xeon CPU. To complement this high-throughput evaluation, edge-deployment potential is profiled using the official C++ TensorFlow Lite benchmark tool. When evaluated using a single CPU thread without batching, the final artifact achieves an unbatched per-sequence latency of 1.356 ms, corresponding to less than 1.4% of the standard 100 ms BSM generation interval. An architecture-width ablation identifies the 64/32/32 recurrent stack as the performance–resource knee point: expanding it to 128/64/64 improves validation macro-F1 by only 0.0019 percentage points while increasing TensorFlow Lite footprint and latency by factors of 2.46 and 2.32, respectively. A training-time architecture-preserving feature-family ablation confirms that engineered descriptors are essential: raw kinematics alone reduce noise-inclusive macro-F1 from 98.67% to 67.49%, with pseudonym dynamics and position-consistency cues producing the largest individual degradations.