Deterministic Integer Topologies: Bypassing the Matrix-Multiplication Bottleneck via Cache-Resident Graph Traversal

A 6-regular integer lattice of order N = T112 = 6328 occupies 74.16 KiB and fits in a 256 KiB Kaby Lake L2. Two-socket telemetry: 9.76 ns/hop on an i7-7700 (102 M hops/s) and 5.75 ns/hop on an i7-14700F (174 M hops/s). Fail-closed halt 1.5 µs / 800 ns. One 1024×1024 float32 GEMM on the 7700 is 7.48 ms (767k hops). Not a language model. Hops versus FLOPs. This is a measured cache-resident state router, not a transformer. Software: https://github.com/ultranetcommand-neo/t112-l2-lattice Table (dataset, not a model): https://huggingface.co/datasets/UltranetCommand/t112-l2-lattice

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Publication Details

Journal
Zenodo (CERN European Organization for Nuclear Research)
Published
2026-09-05
DOI
https://doi.org/10.5281/zenodo.22406010
Primary Topic
Interconnection Networks and Systems
Type
preprint
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preprint

Deterministic Integer Topologies: Bypassing the Matrix-Multiplication Bottleneck via Cache-Resident Graph Traversal

Matthew Scott Gibson
Zenodo (CERN European Organization for Nuclear Research)
Interconnection Networks and Systems
preprint

Deterministic Integer Topologies: Bypassing the Matrix-Multiplication Bottleneck via Cache-Resident Graph Traversal

Matthew Scott Gibson
preprint en

Abstract

A 6-regular integer lattice of order N = T112 = 6328 occupies 74.16 KiB and fits in a 256 KiB Kaby Lake L2. Two-socket telemetry: 9.76 ns/hop on an i7-7700 (102 M hops/s) and 5.75 ns/hop on an i7-14700F (174 M hops/s). Fail-closed halt 1.5 µs / 800 ns. One 1024×1024 float32 GEMM on the 7700 is 7.48 ms (767k hops). Not a language model. Hops versus FLOPs. This is a measured cache-resident state router, not a transformer. Software: https://github.com/ultranetcommand-neo/t112-l2-lattice Table (dataset, not a model): https://huggingface.co/datasets/UltranetCommand/t112-l2-lattice

Zenodo (CERN European Organization for Nuclear Research)
Stimson Center (US)
Interconnection Networks and Systems
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