Bending Fatigue Evaluation and Failure Modes of Ultra‐Thin Silicon Chips on Flexible Substrates

ABSTRACT Flexible integrated electronic technology enables the next generation of more flexible, freer, lighter, and smaller intelligent hardware, providing information sensing and edge computing capabilities for applications such as embodied intelligence, healthcare, and industrial Internet of Things. By thinning and integrating diverse chips onto a thin‐film polymer substrate, these flexible integrated devices retain advantages of semiconductor devices, including high integration density, low power consumption, and mature front‐end processes, without altering the fundamental device structures and materials. Although the electrical performance of ultra‐thin chips remains essentially unchanged after flexible packaging, the mechanical reliability during repeated bending deformation has been a critical concern due to the significant property mismatch between silicon and polymer materials, which may cause silicon fracture, interfacial failure, and eventual device failure. This study investigates and evaluates the fatigue lifetime of 20‐μm‐thick chips under repeated bending deformation with various radii of curvature. Through systematic experiments, the typical failure phenomena evolution is observed, finding three types of failure modes including metal pad wearing, metal stress migration, and gold wire break. The underlying failure mechanisms have been analyzed and explained by micro‐scale characterization. Finally, temperature effect on the fatigue lifetime has been explored trying to throw light on heating‐based accelerated fatigue life assessment method for the flexible chips. Hopefully, this work can provide essential support for the design to large‐scale application of flexible integrated devices in the widespread intelligent hardware products.