C-PathGen: An Efficient CPU-Parallel Critical Path Generation Algorithm
Critical Path Generation (CPG) is fundamental for many static timing analysis (STA) applications. As the circuit complexity continues to increase, CPG runtime has quickly become the bottleneck due to its time-consuming and iterative nature. Despite many CPG algorithms introduced by existing timers, nearly all of them are limited to a single CPU thread , leading to long runtime for large CPG queries. To mitigate this runtime challenge, we need a parallel CPG algorithm. However, designing a parallel CPG algorithm is very challenging because we need to strategically partition the path search space into multiple groups that can run in parallel while accommodating different slack priorities. To overcome this challenge, we propose C-PathGen , an exact and efficient CPU-parallel CPG algorithm. Building on our prior CPU-parallel CPG algorithm, PathGen, C-PathGen overcomes its inaccuracy by filtering out non-critical paths. Additionally, to eliminate contention caused by atomic operations on generated paths, we introduce a new exploration strategy that processes the paths directly in place. Compared to PathGen, C-PathGen is 6.8 × –10.3 × faster while producing exact results when dealing with large path queries on industrial circuit graphs.
Authors
- Yibo Lin (ORCID: https://orcid.org/0000-0002-0977-2774)
- Cheng-Hsiang Chiu (ORCID: https://orcid.org/0000-0002-0406-885X)
- Wan Luan Lee (ORCID: https://orcid.org/0009-0007-2156-2765)
- Boyang Zhang (ORCID: https://orcid.org/0009-0007-2008-7915)
- Zizheng Guo (ORCID: https://orcid.org/0000-0002-0724-5356)
- Dian-Lun Lin (ORCID: https://orcid.org/0000-0003-3075-7437)
- Tsung‐Wei Huang (ORCID: https://orcid.org/0000-0001-9768-3378)
- Che Chang (ORCID: https://orcid.org/0009-0001-5455-037X)
- Yi-Hua Chung (ORCID: https://orcid.org/0009-0008-1064-2513)
Institutions
- University of Wisconsin–Madison (US)
- Peking University (CN)
- Cadence Design Systems (United States) (US)
Publication Details
- Journal
- ACM Transactions on Design Automation of Electronic Systems
- Published
- 2026-08-27
- DOI
- https://doi.org/10.1145/3844513
- Primary Topic
- VLSI and FPGA Design Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00