An Implantable Charge Balanced Neurostimulator IC Using Standard CMOS Process
This paper presents the design of a bipolar current-mode stimulator integrated circuit (IC) for implantable prosthetic devices using 0.18-μm standard CMOS process. The proposed stimulator IC is capable of delivering up to 1-mA current through 10-kΩ load using 12.8 V supply voltage. The output impedance of the stimulator is enhanced by utilizing a regulated cascode output current driver stage, which achieves a voltage compliance of 12.4 V. In order to allow low-voltage standard transistors to operate reliably at high voltage, transistor stacking and dynamic gate biasing techniques are used. In addition, a simple active charge balancing circuit is included to achieve minimal net charge after stimulation cycle is complete. The overall layout area is 0.12 mm².
Authors
- Tuan Vo (ORCID: https://orcid.org/0009-0005-0138-9024)
- Hyouk‐Kyu Cha (ORCID: https://orcid.org/0000-0003-4193-9180)
Publication Details
- Journal
- IEIE Transactions on Smart Processing and Computing
- Published
- 2026-08-27
- DOI
- https://doi.org/10.5573/ieiespc.2026.15.4.591
- Primary Topic
- Neuroscience and Neural Engineering
- Type
- article
- Field-Weighted Citation Impact
- 0.00