Guiding Large Language Models with Common Weakness Enumeration Hierarchies for Scalable Hardware Security Assertion Generation

This project explores how large language models (LLMs) can be used to automatically identify security vulnerabilities in computer hardware designs before they are manufactured into chips. By using the hierarchical structure of the Common Weakness Enumeration (CWE), a database of known computer security weaknesses, we guide LLMs to identify security risks and generate security properties for hardware designs. Our approach detected 27 of 42 known hardware security vulnerabilities across three chip designs, discovered one previously unknown bug, and corrected three incorrect human-written security properties. These results demonstrate a practical direction for automating hardware security verification and helping engineers identify security problems earlier in the design process.