Architecture-Driven Hardware-in-the-Loop Verification: A Bidirectional MBSE Framework Demonstrated on a Low-Cost UAV

Integrating Model-Based Systems Engineering (MBSE) with Digital Twins (DTs) offers a promising way to transform static system models into dynamic, runtime-connected representations that enable execution, monitoring, and validation. Much current research in this area remains focused on descriptive modeling, simulation-based workflows, or unidirectional data flow, leaving a gap in methods that link architectural models directly to physical system behavior in a closed-loop system. This study fills that gap by proposing and demonstrating a four-layer framework that supports traceable, bidirectional interaction between a system’s architecture and its physical implementation. The framework consists of four interconnected layers: System Definition, Model Translation and Integration, Execution and Monitoring, and Feedback and Synchronization. The System Definition Layer captures mission goals, functional responsibilities, subsystem decomposition, and mission parameters in Capella using the Arcadia methodology. The Model Translation and Integration Layer translates these properties into executable commands via Python4Capella, converting architecture-level parameters into actionable instructions. The Execution and Monitoring Layer executes these commands in MATLAB, while the Feedback and Synchronization Layer returns runtime data to the model, supporting validation, model awareness, and refinement. A UAV case study is used to validate the framework: the UAV architecture is decomposed into key logical subsystems, and mission behaviors such as takeoff, movement, turning, and landing were modeled parametrically using the Property Values Management Tool (PVMT). These properties were translated into MATLAB commands, executed on a physical UAV, and evaluated based on telemetry-based mission distance accuracy. This work demonstrates that an MBSE model can serve not only as a design artifact but also as an authoritative, execution-connected component of a digital twin workflow. The framework contributes to MBSE-driven digital twin research by providing a structured process for integrating architecture, translation, execution, monitoring, and synchronization in a traceable manner. Overall, the study provides a scalable foundation for future developments in hardware-in-the-loop testing and digital twin applications for cyber–physical systems, and further empirical evaluation is needed to assess the framework’s transferability across domains.