A sacrificial HfN interlayer enables oxygen-buffered Mo electrodes for sub‑0.4nm equivalent oxide thickness of HfO2/ZrO2 nanolaminates for DRAM capacitors

Continued scaling of dynamic random-access memory (DRAM) capacitors demands simultaneous achievement of high capacitance density and extremely low leakage current at ever-decreasing physical thickness, making interfacial chemistry and defect control as critical as the choice of high-k dielectric. Here, we propose a HfN sacrificial interlayer to mitigate interfacial redox reactions when integrating Mo electrodes with an ALD-grown HfO 2 /ZrO 2 /HfO 2 (HZH) nanolaminate designed to exploit the morphotropic phase boundary (MPB)-related high permittivity. A 1 nm-thick sputtered HfN layer is selectively oxidized during subsequent atomic layer deposition, forming an HfO x N y interlayer that suppresses formation of defective MoO x and reduces Mo species penetration into the dielectric, as confirmed by cross-sectional transmission electron microscope study as well as chemical analyses. Pulse-based charge/discharge measurements yield k ≈ 59 at operating-relevant fields for 6.0–6.5 nm physical thickness, while the leakage current density is reduced by ≈ 2–3 orders of magnitude compared with the HfO 2 -interfaced control, satisfying <10 –7 A cm -2 at 0.8 V (V DD /2) for optimized stacks. The best device achieves an equivalent oxide thickness down to 0.39 nm within the DRAM operating window and maintains both dielectric response and leakage stability up to 10 9 endurance cycles. This interfacial “oxygen-buffering” strategy provides a practical process window for Mo-electrode, MPB-engineered fluorite-structured nanolaminate capacitors targeting advanced DRAM nodes.