Geometry-defined impact ionization in two-stage mesa-type silicon electron multipliers
We demonstrate a silicon electron multiplier that achieves internal multiplication by impact ionization in a localized high-field region without relying on a dedicated doped gain layer. Two-stage mesa-type architecture induces strong electric-field crowding in a confined cylindrical mesa, thereby localizing the peak electric field within the mesa. The fabricated devices exhibit an effective multiplication factor (M) exceeding 100 for |Vgate| < 50 V. The buried gate electrostatically controls carrier transport through the injection stage into the multiplication stage (cylindrical mesa), enabling stable and tunable multiplication. Carrier transport is characterized by a pseudo-pinch-off condition that steers carriers toward the mesa’s center. The multiplication exhibits low temperature sensitivity of dVgate/dT = 24–30 mV/°C at constant M (M = 10). These results provide a design principle for geometry-defined electron multiplication with electrostatically controlled injection, particularly for semiconductors where conventional doped gain layers are impractical.
Authors
- T. Kobayashi (ORCID: https://orcid.org/0000-0001-5669-1937)
- Naoki Kamiya (ORCID: https://orcid.org/0000-0002-8642-5135)
- R. Shiozaki
- Yusuke Matsunaga (ORCID: https://orcid.org/0000-0002-8563-5835)
- Hironori Sonobe (ORCID: https://orcid.org/0009-0009-2885-5880)
- Ayumi Kaneoka (ORCID: https://orcid.org/0009-0005-9099-7231)
Institutions
- Hamamatsu Photonics (Japan) (JP)
Publication Details
- Journal
- APL Electronic Devices
- Published
- 2026-07-30
- DOI
- https://doi.org/10.1063/5.0331288
- Primary Topic
- Advancements in Semiconductor Devices and Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00