AAPDE: Adaptive Pre-Sieving and Fused Primality–Factor Routing for 64-bit Integers

This paper tests whether bounded pre-sieving and adaptive routing improve an unsigned 64-bit primality-and-factor pipeline whose decision stage uses deterministic Miller–Rabin witnesses and whose extraction stage uses Pollard’s rho. The Adaptive Analysis, Primality Decision, and Extraction (AAPDE) architecture was developed in two versions. V1 performed early sensing before deterministic MR64 and a second sensor scan before factor extraction. A 100,000-case confirmatory holdout achieved complete correctness but favored the standalone Pollard route: the ratio of mean case-median latencies was 0.997224 (95% stratified bootstrap CI 0.995648–0.998799). V2 fused small-factor recovery into the MR64 gate and eliminated duplicated trials. Development selected a post-gate ceiling of 251. A new-seed holdout of 100,000 cases, five repetitions, and two strategies generated 1,000,000 observations. It recorded zero classification errors, invalid factors, and timeouts, with 443,050 valid factor recoveries per strategy. The primary Pollard/AAPDE ratio was 0.994632 (95% CI 0.994371–0.994897), and the paired mean difference was 1.764 µs (95% CI 1.674–1.854), favoring Pollard. V2 reduced modular multiplications, modular additions, and greatest-common-divisor calls slightly, but added 20.38 sensor divisions per execution. An exploratory advantage appeared only for unbalanced semiprimes. These results reject aggregate speed superiority while establishing a transparent negative result: fusion corrects duplicated work, yet bounded sensing remains workload-dependent and can be dominated by division overhead.

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Publication Details

Journal
Zenodo (CERN European Organization for Nuclear Research)
Published
2026-07-27
DOI
https://doi.org/10.5281/zenodo.21615111
Primary Topic
Low-power high-performance VLSI design
Type
preprint
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preprint

AAPDE: Adaptive Pre-Sieving and Fused Primality–Factor Routing for 64-bit Integers

Ahmed Ashlam
Zenodo (CERN European Organization for Nuclear Research)
Low-power high-performance VLSI design
preprint

AAPDE: Adaptive Pre-Sieving and Fused Primality–Factor Routing for 64-bit Integers

Ahmed Ashlam
preprint en

Abstract

This paper tests whether bounded pre-sieving and adaptive routing improve an unsigned 64-bit primality-and-factor pipeline whose decision stage uses deterministic Miller–Rabin witnesses and whose extraction stage uses Pollard’s rho. The Adaptive Analysis, Primality Decision, and Extraction (AAPDE) architecture was developed in two versions. V1 performed early sensing before deterministic MR64 and a second sensor scan before factor extraction. A 100,000-case confirmatory holdout achieved complete correctness but favored the standalone Pollard route: the ratio of mean case-median latencies was 0.997224 (95% stratified bootstrap CI 0.995648–0.998799). V2 fused small-factor recovery into the MR64 gate and eliminated duplicated trials. Development selected a post-gate ceiling of 251. A new-seed holdout of 100,000 cases, five repetitions, and two strategies generated 1,000,000 observations. It recorded zero classification errors, invalid factors, and timeouts, with 443,050 valid factor recoveries per strategy. The primary Pollard/AAPDE ratio was 0.994632 (95% CI 0.994371–0.994897), and the paired mean difference was 1.764 µs (95% CI 1.674–1.854), favoring Pollard. V2 reduced modular multiplications, modular additions, and greatest-common-divisor calls slightly, but added 20.38 sensor divisions per execution. An exploratory advantage appeared only for unbalanced semiprimes. These results reject aggregate speed superiority while establishing a transparent negative result: fusion corrects duplicated work, yet bounded sensing remains workload-dependent and can be dominated by division overhead.

Zenodo (CERN European Organization for Nuclear Research)
Center for Solar Energy Research and Studies (LY)
Peace, Justice and strong institutions
Low-power high-performance VLSI design
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AAPDE: Adaptive Pre-Sieving and Fused Primality–Factor Routing for 64-bit Integers — Ahmed Ashlam · Zenodo (CERN European Organization for Nuclear Research) (2026) | TGRS Research Map | TGRS