A Hardware Jet Algebra Coprocessor over a Split M31 Biquadratic Algebra: Deterministic Higher-Order Differentiation without Floating-Point

This paper presents a hardware jet algebra coprocessor that evaluates exact Cauchy products, a [4/4] Padé rational approximant, and Kohonen SOM classification over the split biquadratic algebra A₃₁ = F_p[u,v]/(u²−3, v²−5) with p = 2³¹−1 (M31) — deterministic higher-order differentiation with no floating point, no square roots, and no rounding policy. The integrated RPLU2PADE image is routed and silicon-tested on a Xilinx Artix-7 100T (20,277 SLICE_LUTX, 72 DSP48E1); a separate Gowin GW5A-25A arithmetic/configuration probe is silicon-tested with zero DSPs. All results were produced with the open-source FPGA toolchain (Yosys + nextpnr). Reproducibility. Source, exact build commands, and the software oracle that regenerates every table in this paper are available at https://github.com/pinnacletechnologysolutionsltd/SPU at commit f1e4dbf06aa1163cc98005feb063ec8aae7c933a. From a fresh clone of that commit: python3 tools/rplu_paper_data.py --verify reproduces all 39 table vectors, and python3 run_all_tests.py passes the full 172-test regression, including all 129 Verilog testbenches. The PDF in this deposit was built from that commit (SHA-256 1fc2b48fdefb0ce6f0004ee66ea4b10143c0575260dbee6455a0d0f53c956122).