A frequency-selective circuit in 180 nm CMOS

A frequency-selective device has been developed in the form of a rejector active filter based on transconductance amplifiers and capacitors in the 180 nm CMOS technology of Mikron JSC. The layout dimensions are 62 x 26 µm. Post-layout simulation results are as follows: rejection frequency is 312.5 MHz; passband gain is 1.44 dB; rejection is 23.1 dB; power consumption is 4.8 mW; total harmonic distortion is 0.07%. A comparison with the results from other studies is performed. The device can be applied in optical communication systems.

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Publication Details

Journal
St. Petersburg State Polytechnical University Journal
Published
2026-07-24
DOI
https://doi.org/10.18721/jcstcs.19204
Primary Topic
Advancements in PLL and VCO Technologies
Type
article
Field-Weighted Citation Impact
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article

A frequency-selective circuit in 180 nm CMOS

Dmitry V. Morozov, Mikhail M. Pilipko
St. Petersburg State Polytechnical University Journal
Advancements in PLL and VCO Technologies
article

A frequency-selective circuit in 180 nm CMOS

Dmitry V. Morozov, Mikhail M. Pilipko
article en

Abstract

A frequency-selective device has been developed in the form of a rejector active filter based on transconductance amplifiers and capacitors in the 180 nm CMOS technology of Mikron JSC. The layout dimensions are 62 x 26 µm. Post-layout simulation results are as follows: rejection frequency is 312.5 MHz; passband gain is 1.44 dB; rejection is 23.1 dB; power consumption is 4.8 mW; total harmonic distortion is 0.07%. A comparison with the results from other studies is performed. The device can be applied in optical communication systems.

St. Petersburg State Polytechnical University Journal
Peter the Great St. Petersburg Polytechnic University (RU)
Affordable and clean energy
Openalex Percentile: Top 15%
Advancements in PLL and VCO Technologies
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