Design of power limiter for antenna-feeder system for direction finding protection on GaAs pHEMT

This paper presents the development results of a power limiter for the 30–6500 MHz frequency range, implemented as a microwave monolithic integrated circuit (MMIC) based on a domestic GaAs pHEMT technology. Implementing the power limiter as a monolithic integrated circuit reduces the weight and size of the final device compared to a hybrid implementation. The power limiter consists of three cascaded stages connected in parallel, comprising Schottky diodes interconnected by microstrip transmission lines that compensate for the parasitic capacitances of the diodes. The developed power limiter exhibits an insertion loss of less than 0.7 dB, an input and output VSWR of less than 1.2, an input 1 dB compression point of at least 22.8 dBm, and a maximum input power of at least 40.7 W. The MMIC die dimensions are 1400 × 1300 µm. The developed power limiter can be used in the input stage of receiving devices, such as antenna feeder systems for direction finding.

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Publication Details

Journal
St. Petersburg State Polytechnical University Journal
Published
2026-07-24
DOI
https://doi.org/10.18721/jcstcs.19205
Primary Topic
Electromagnetic Compatibility and Noise Suppression
Type
article
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article

Design of power limiter for antenna-feeder system for direction finding protection on GaAs pHEMT

Aleksandr Nikitin, Denis Klimenko, Alexander Stroganov
St. Petersburg State Polytechnical University Journal
Electromagnetic Compatibility and Noise Suppression
article

Design of power limiter for antenna-feeder system for direction finding protection on GaAs pHEMT

Aleksandr Nikitin, Denis Klimenko, Alexander Stroganov
article en

Abstract

This paper presents the development results of a power limiter for the 30–6500 MHz frequency range, implemented as a microwave monolithic integrated circuit (MMIC) based on a domestic GaAs pHEMT technology. Implementing the power limiter as a monolithic integrated circuit reduces the weight and size of the final device compared to a hybrid implementation. The power limiter consists of three cascaded stages connected in parallel, comprising Schottky diodes interconnected by microstrip transmission lines that compensate for the parasitic capacitances of the diodes. The developed power limiter exhibits an insertion loss of less than 0.7 dB, an input and output VSWR of less than 1.2, an input 1 dB compression point of at least 22.8 dBm, and a maximum input power of at least 40.7 W. The MMIC die dimensions are 1400 × 1300 µm. The developed power limiter can be used in the input stage of receiving devices, such as antenna feeder systems for direction finding.

St. Petersburg State Polytechnical University Journal
Center for Applied Special Technology (US), Peter the Great St. Petersburg Polytechnic University (RU)
Affordable and clean energy
Openalex Percentile: Top 15%
Electromagnetic Compatibility and Noise Suppression
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