Wafer-Scale All-Silicon Self-Rectifying Memristor for Synaptic Response and Reservoir Computing

Silicon p–n junctions have remained an indispensable building block of electronics since their invention in the Shockley days. Likewise, an abrupt p–n junction has served as a foundational model in semiconductor textbooks. In this work, we report on an p–n junction in silicon with an oxide interfacial layer, enabling memristive functions with highly rectifying resistive switching and reproducible synaptic behaviors for reservoir computing (RC). The device exhibited a rectification ratio of ∼5000 with stable endurance of 4.5 × 10 6 cycles, without filament formation. Charge-trapping dynamics enable key synaptic behaviors including paired-pulse facilitation, spike-timing-dependent plasticity, and transitions between short- and long-term memory. Leveraging these behaviors, the device performs RC via 4-bit pulse stimulation, achieving 86.9% accuracy in handwritten digit classification. This interface-engineered all-silicon device bridges classical diode physics with modern neuromorphic computation, providing a prospect for wafer-scale platforms for neuromorphic applications.